[coreboot] [kernel-hardening] ME and PSP

[Shawn]

Hi Ron,

On Thu, Sep 7, 2017 at 12:30 PM, ron minnich <rminnich at gmail.com> wrote:
>
>
> On Wed, Sep 6, 2017 at 8:07 PM Shawn <citypw at gmail.com> wrote:
>>
>>
>> IMOHO, RISC-V will be the long-term solution in the future;-)
>>
>
> people need to stop saying that. It's not that simple. And, sadly, riscv may
> be baking in an SMM-like mode that you can't turn off.
>
> RISCV is neat but it's nowhere near the total solution. You can build a very
> closed system with RISCV very easily. RISCV doesn't magically take away ME-
> and PSP-like problems.
>
RISC-V doesn't have NDA issues like x86 which the firmware freedom
will get benefit of it. And yes, the vendor can build a closed system
with RISC-V cu'z RISC-V is not GPL-like license. But it should be much
easier to buy( It'd be much harder get the ThreadX/ARC-based stuff
from Intel even if you are willing to pay?) the source code/solution
from the vendor w/o any NDA restriction. RISC-V is not a magic to
bring us the firmware freedom but provide more options.



-- 
GNU powered it...
GPL protect it...
God blessing it...

regards
Shawn