[coreboot] Problems changing payload on Intel Leaf Hill

[Cameron Craig]

Hi Tahnia et al,

Have you had any luck with Tianocore or SeaBIOS on Leaf Hill?

I would be interested to know if you (or anyone!) have managed to get any of these working on Leaf Hill.
We are now also considering these, as U-Boot on Leaf Hill looks like a fair bit of work.

Cheers,
Cameron

>

Cameron Craig | Graduate Software Engineer | Exterity Limited
tel: +44 1383 828 250 | fax:  | mobile:
e: Cameron.Craig at exterity.com | w: www.exterity.com


-----Original Message-----
>From: coreboot [mailto:coreboot-bounces at coreboot.org] On Behalf Of Nico
>Huber
>Sent: 10 October 2017 15:12
>To: Tahnia Lichtenstein; coreboot at coreboot.org
>Subject: Re: [coreboot] Problems changing payload on Intel Leaf Hill
>
>Hi Tahnia,
>
>On 10.10.2017 10:29, Tahnia Lichtenstein wrote:
>> ...
>>
>> Then I built this version of coreboot with a self-compiled payload,
>> such as Tianocore UDK2017 CorebootPayloadPkg or SeaBIOS, using the
>> .confg files provided by Intel for UEFI payloads or legacy payloads
>> respectively (just modified for specific payload type and path, and
>> disabling verified and measured boot). I stitched the coreboot output
>> with the Intel-provided blobs using the exact same method as before.
>> Then, in run-time, coreboot transitions to the payload and nothing
>> happens from then on (i.e. no further serial debug messages, no change to
>display monitor).
>
>you've only attached config files for your coreboot but not for the payloads.
>It's hard to tell what output to expect without that (e.g.
>do you have serial output enabled in your SeaBIOS build? if you let the
>coreboot build environment configure SeaBIOS it is enabled expli- citly). So
>with the current information you've provided, it could just be that the
>payloads don't try to output anything on serial.
>
>Output on a monitor is a little more complicated and depends on each
>payload. SeaBIOS expects a Video BIOS to be present. This can either be an
>option ROM from a gfx adapter card (looking at your logs, you don't seem to
>have one), a Video BIOS file in CBFS matching the inte- grated gfx adapter, or,
>in case coreboot already configured a frame- buffer, a Video BIOS shim called
>SeaVGABIOS (aka. cbvga in this case, it's a separate component in the SeaBIOS
>source).
>
>Current CorebootPayloadPkg *should* be able to use a preconfigured
>framebuffer. I never tried it, though, and there are reports that it doesn't
>always work... It's generally possible that Intel's precom- piled UEFI payload
>has it's own gfx driver (GOP) built in.
>
>> ...
>> Am I not specifying the correct configuration options for Tianocore
>> and SeaBIOS? I.e. is there more to it than just selecting the payload
>> type and specifying the payload path? Do I need to configure or update
>> memory addresses or ranges to match payload sizes, or some such? Do I
>> need to make specific changes to the payloads' source code to support
>> the platform? Any advice on how/where to start debugging?
>
>Usually there is nothing more to specify. The best option, IMO, is to get one of
>the simpler payloads (SeaBIOS should do) to output on serial.
>You can also test your SeaBIOS binary in QEMU to make sure it does out- put
>something.
>
>Hope that helps,
>Nico
>
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