[coreboot] [RFC] Successful build with GCC 7.2 and IASL 20170831 for coreboot 4.7

Iru Cai mytbk920423 at gmail.com
Tue Oct 3 06:21:21 CEST 2017


Hi all,

I found that ACPICA released version 20170929 yesterday, and it's more
strict than previous versions. I can't even use it to build qemu-i440fx
because many dsdt files have methods that are not used, which will make
iasl warn about this.

Iru

On Tue, Oct 3, 2017 at 11:50 AM, Matt DeVillier <matt.devillier at gmail.com>
wrote:

> hi Paul,
>
> I took a look at this, and the error appears to be the result of a change
> in IASL 20170531:
>
> "Improved the behavior of the iASL compiler and disassembler to detect
> improper use of external declarations"
>
> According to the ACPI 6.2 spec, "The External directive informs the ASL
> compiler that the object is declared external to this table.."  This reads
> to me that if an object is declared External in one table (eg, the DSDT),
> then its declaration must be in another table, not in the table in which
> contains the External reference.  As _SB.DPTF.TEVT is declared in the DSDT
> (in SoC .asl code), then the External declaration in the
> chromeec/acpi/ec.asl is invalid.
>
> To test this, I removed the External declaration in ec.asl, and the
> previously failing boards now build properly with iASL 20170831.  I also
> retested using the current iASL version (20161222), and the aforementioned
> boards still build correctly.
>
> If someone wants to corroborate my analysis, then I'm happy to submit a
> patch to correct the issue
>
> cheers,
> Matt
>
> On Mon, Oct 2, 2017 at 1:56 AM, Paul Menzel <paulepanter at users.
> sourceforge.net> wrote:
>
>> Dear coreboot folks,
>>
>>
>> Am Mittwoch, den 20.09.2017, 08:17 +0200 schrieb Paul Menzel:
>>
>> > I’d like to propose the following goal for the upcoming coreboot 4.7
>> > release.
>> >
>> > All boards have to build with GCC 7.2 [1] and IASL 20170831 [2].
>> >
>> > For the latter, several Intel boards fail to build [3]. It’d be great
>> > if the maintainers looked into it.
>>
>> Unfortunately, there was no reply yet. Patrick already blocked the
>> change-set, and commented that it’ll only go in after the coreboot 4.7
>> release, which is fine. But the boards should still build in my
>> opinion.
>>
>> The boards below are affected by the IASL update.
>>
>> ```
>> $ git grep TEVT
>> src/ec/google/chromeec/acpi/ec.asl:External (\_SB.DPTF.TEVT, MethodObj)
>> src/ec/google/chromeec/acpi/ec.asl:                     If (CondRefOf
>> (\_SB.DPTF.TEVT)) {
>> src/ec/google/chromeec/acpi/ec.asl:
>>  \_SB.DPTF.TEVT (Local0)
>> src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl:Method
>> (TEVT, 1, NotSerialized)
>> src/soc/intel/baytrail/acpi/dptf/thermal.asl:Method (TEVT, 1,
>> NotSerialized)
>> src/soc/intel/braswell/acpi/dptf/thermal.asl:Method (TEVT, 1,
>> NotSerialized)
>> src/soc/intel/common/acpi/dptf/thermal.asl:Method (TEVT, 1,
>> NotSerialized)
>> src/soc/intel/skylake/acpi/dptf/thermal.asl:Method (TEVT, 1,
>> NotSerialized)
>> ```
>>
>> What is the process for this? Are the maintainers of the board that
>> fail to build subscribed on this mailing list?
>>
>>
>> Kind regards,
>>
>> Paul
>>
>>
>> > [1] https://review.coreboot.org/20809/
>> > [2] https://review.coreboot.org/21156/
>> > [3] https://ticket.coreboot.org/issues/138
>>
>> --
>> coreboot mailing list: coreboot at coreboot.org
>> https://mail.coreboot.org/mailman/listinfo/coreboot
>>
>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> https://mail.coreboot.org/mailman/listinfo/coreboot
>



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