[coreboot] New Subscriber

[Robert Walz]

Hello coreboot community,

I'm 23 years old and I'm studying computer science in germany.
I want to flash coreboot on my Lenovo T420 with Raspberry Pi's SPI, read a
lot of content on coreboot.org, but I would have some more questions.

1) About VBIOS:
I have Sandy Bridge with integrated graphics (Intel Corporation 2nd
Generation Core Processor Family Integrated Graphics Controller) so it
wouldn't be necessary to build the coreboot.rom with a VBIOS, I want to
boot with SeaBIOS without graphics. But if I don't add the VBIOS, what is
used after the boot? For example I dumped the current vbios.rom of the VGA
compatible controller in linux with

echo 1 | tee /sys/devices/pci0000\:00/0000\:00\:02.0/rom
cat /sys/devices/pci0000\:00/0000\:00\:02.0/rom > vbios.rom

and disassembled it with

ndisasm -k 0,3 vbios.rom | less
strings vbios.rom | less

Where is this current vbios stored and for what is it needed?
Can I replace it with coreboots VBIOS? Or is it even not necessary and its
deleted, if I use coreboot without VBIOS?

2) About proprietary BIOS
Is it possible to download a "full" BIOS (with descriptor, me, ...), like
it is stored on the mainboard flash chip?, because on the lenovo support
webpage I can only find BIOS-Updates, with an empty offset for the
descriptor, the intel me and the GbE followed by the BIOS. And this .FL1
file is even biggen then 8 MiB, maybe because it also includes the EC?

3) About the EC
Is it possible to create a full EC, which I can flash on the mainboard chip
with the raspberry pi?, or does an open source EC already exist for the
T420 (I just found one for T400 on libreboot). Is the EC store on another
chip?


I can write a tutorial for the webpage about flashing the T420 with
raspberry pi's SPI, if required let me know.

Additionally I try to use the me_cleaner to reduce the ME code to a
minimum.

Thanks in advance!

Regards Robert
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