[coreboot] Intel Rangeley: System is hanging after post code 0x92.

[Dhanasekar Jaganathan]

Hi All,

I am trying to boot Intel Atom Rangeley Sever CPU (Mohon Peak) with
coreboot BIOS.

After Postcode 0x92, system is not booting.

I have pasted the debug message below,
*coreboot-4.5-1596-gb86ccbb Thu Apr 20 14:55:30 UTC 2017 romstage
starting...*
*POST: 0x41*
*POST: 0x42*
*Setting up static southbridge registers... done.*
*Disabling Watchdog timer... done.*
*RTC Failure detected.  Resetting Date to 04/20/2017*
*RTC Init*
*RTC: Clear requested zeroing cmos*
*POST: 0x46*
*POST: 0x47*
*Starting the Intel FSP (early_init)*
*Configure Default UPD Data*
*PcdEnableIQAT 1*
*PcdEnableLan 1*
*PcdEnableLan 1*
*PcdEnableLan 1*
*PcdEnableLan 1*
*PcdEnableUsb20 1*
*PcdEnableSata2 1*
*PcdEnableSata3 1*
*PcdPcieRootPort1DeEmphasis:             0x00 (default)*
*PcdPcieRootPort2DeEmphasis:             0x00 (default)*
*PcdPcieRootPort3DeEmphasis:             0x00 (default)*
*PcdPcieRootPort4DeEmphasis:             0x00 (default)*
*CBFS: 'Master Header Locator' located CBFS at [100:7fffc0)*
*CBFS: Locating 'mrc.cache'*
*CBFS: Checking offset 0*
*CBFS: File @ offset 0 size 20*
*CBFS:  Unmatched 'cbfs master header' at 0*
*CBFS: Checking offset 80*
*CBFS: File @ offset 80 size 5e84*
*CBFS:  Unmatched 'fallback/romstage' at 80*
*CBFS: Checking offset 5f80*
*CBFS: File @ offset 5f80 size 227*
*CBFS:  Unmatched 'config' at 5f80*
*CBFS: Checking offset 6200*
*CBFS: File @ offset 6200 size 23a*
*CBFS:  Unmatched 'revision' at 6200*
*CBFS: Checking offset 6480*
*CBFS: File @ offset 6480 size 528*
*CBFS:  Unmatched 'cmos_layout.bin' at 6480*
*CBFS: Checking offset 6a00*
*CBFS: File @ offset 6a00 size 1f96*
*CBFS:  Unmatched 'fallback/dsdt.aml' at 6a00*
*CBFS: Checking offset 8a00*
*CBFS: File @ offset 8a00 size 7498*
*CBFS:  Unmatched '' at 8a00*
*CBFS: Checking offset fec0*
*CBFS: File @ offset fec0 size 10000*
*CBFS: Found @ offset fec0 size 10000*
*find_current_mrc_cache_local: No valid fast boot cache found.*
*FSP MRC cache not present.*
*POST: 0x92*

Is there any setting I need to do in "make menuconfig"?. Actually, It
should go to RAM Stage, but it is not.

Please provide suggestion.

Thanks,

Dhanasekar
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