[coreboot] How can we get MRC.bin for Intel platform.

[Matt DeVillier]

Since your board is a Broadwell-U, easiest way will be to extract it (along
with the required refcode blob) from the generic/shellball image firmware
for a Broadwell-U Chromebook (using cbfstool), which itself can be
extracted from a ChromeOS recovery image.  John Lewis wrote up some helpful
instructions here:
https://johnlewis.ie/extracting-the-shell-ball-rom-using-a-chromeos-image/
I'd recommend using the image for 'SAMUS', the Google Chromebook Pixel2.

On Sat, Jul 29, 2017 at 3:31 AM, Zheng Bao <fishbaoz at hotmail.com> wrote:

> Hi, All,
> I am debugging a i7-5650 board. I use IBV's BIOS to wrap the coreboot,
> i.e, replace the BIOS Region with coreboot.rom.
> So I assume the ME blob can work.
> I wonder if it is the right way.
>
> Is it fully supported by Coreboot?
> How can we get MRC.bin and other blobs?
>
> Thanks.
>
> Zheng
>
> coreboot-4.6-891-gca74434-dirty Fri Jul 28 06:45:02 UTC 2017 romstage
> starting...
> PM1_STS:   0000
> PM1_EN:    0000
> PM1_CNT:   00000000
> TCO_STS:   0000 0000
> GPE0_STS:  08fe08fc 12400f35 6005e200 00000000
> GPE0_EN:   00000000 00000000 00000000 00000000
> GEN_PMCON: 0200 2024 4206
> Previous Sleep State: S5
> CPU: Intel(R) Core(TM) i7-5650U CPU @ 2.20GHz
> CPU: ID 306d4, Broadwell E0 or F0, ucode: 0000001f
> CPU: AES supported, TXT supported, VT supported
> MCH: device id 1604 (rev 09) is Broadwell F0
> PCH: device id 9cc3 (rev 03) is Broadwell U Premium
> IGD: device id 1626 (rev 09) is Broadwell U GT3 (15W)
> CPU: frequency set to 2200 MHz
> SPD: index 0 (GPIO47=0 GPIO9=0 GPIO13=0)
> CBFS: 'Master Header Locator' located CBFS at [300100:3fffc0)
> CBFS: Locating 'spd.bin'
> CBFS: Found @ offset 43f00 size 1000
> SPD: module type is DDR3
> SPD: module part is 99U5469-011.A01LF
> SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
> SPD: device width 16 bits, bus width 64 bits
> SPD: module size is 4096 MB (per channel)
> ME: FW Partition Table      : OK
> ME: Bringup Loader Failure  : NO
> ME: Firmware Init Complete  : NO
> ME: Manufacturing Mode      : YES
> ME: Boot Options Present    : NO
> ME: Update In Progress      : NO
> ME: Current Working State   : Initializing
> ME: Current Operation State : Bring up
> ME: Current Operation Mode  : Security Override via Jumper
> ME: Error Code              : Debug Failure
> ME: Progress Phase          : BUP Phase
> ME: Power Management Event  : Pseudo-global reset
> ME: Progress Phase State    : 0x7b
> ERROR: ME failed to respond
> FMAP: Found "FLASH" version 1.1 at 300000.
> FMAP: base = ffc00000 size = 400000 #areas = 3
> MRC: no data in 'RW_MRC_CACHE'
> No MRC cache found.
> CBFS: 'Master Header Locator' located CBFS at [300100:3fffc0)
> CBFS: Locating 'mrc.bin'
> CBFS: 'mrc.bin' not found.
> Couldn't find mrc.bin
>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> https://mail.coreboot.org/mailman/listinfo/coreboot
>
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