[coreboot] Haswell port

[Nico Huber]

Hello Konstantin,

On 26.07.2017 13:40, Konstantin Novikov wrote:
> Hello, Zoran.
> 
> So, we closed that issue. Function northbridge_init() didn't executed,
> because we didn't had structure with desktop pci_driver. Memory map was
> builded, SeaBIOS now works correctly (boot from DVD and HDD). But load
> isn't correct. Ubuntu Linux and Live CD are died after load screen. Errors
> in terminal are different load-to-load (usually some "NMI watchdog:
> Watchdog detected hard LOCKUP on cpu #(0-3)").
> 
> 1. Ubuntu loaded in recovery mode. They are different in 'nomodeset'
> parameter (Ubuntu Linux loads without graphics drivers). VGA BIOS included,
> bootspash and SeaBIOS output are visible. Can it be because of uncorrect
> graphics initialization?

unlikely. Though there could be something in the chipset initialization
related to GFX going wrong.

As you seem to only run into trouble in Linux but not in the payload:
One thing that makes a huge difference when Linux starts is SMP. I'd
try to boot with a single core, e.g. `maxcpus=1` or maxcpus=`0` in the
kernel command line (the latter also disables the IO APIC but that might
cause other issues as coreboot is bad at legacy IRQ routing).

> 2. How works memconfig? We has read dmesg from coreboot and native BIOS. In
> coreboot we used 0xf000000 memconfig base, in native used 0xf8000000. Is it
> critical? We tried to use 0xf8000000, but didn't loaded in SeaBIOS.

Better don't change this option. The allocation is up to the firmware
developer, and depending on the size of the MMConf region and placement
of other I/O ranges it might just not fit at 0xf8000000. That it is not
at the same location as with the vendor BIOS is irrelevant.

Hope that helps,
Nico