[coreboot] SMBIOS table enablement in coreboot

[Mayuri Tendulkar]

Hi David

Thanks for response.

So are there any other settings which enable Type 17 i.e. DDR data information in SMBIOS?

We don’t see this Type 17 information in our table.

Regards
Mayuri

From: David Hendricks [mailto:dhendrix at google.com]
Sent: 18 January 2017 01:58
To: Mayuri Tendulkar <mayuri.tendulkar at aricent.com>
Cc: coreboot <coreboot at coreboot.org>
Subject: Re: [coreboot] SMBIOS table enablement in coreboot

Hi Mayuri,

On Sun, Jan 15, 2017 at 5:40 PM, Mayuri Tendulkar <mayuri.tendulkar at aricent.com<mailto:mayuri.tendulkar at aricent.com>> wrote:
Hi David

Yes, below are settings for our system. As we are using Intel Baytrail, does this SMBIOS manufacturer shd be Intel?

That's up to you. Mainboard manufacturer, along with product name, serial number, and version, are strings which are expected to be assigned by the vendor. You may set these in your mainboard's Kconfig file. The Macbook 2.1 port shows an example of how to do this: https://review.coreboot.org/cgit/coreboot.git/tree/src/mainboard/apple/macbook21/Kconfig#n32.

Other SMBIOS tables such as memory info is generated automatically by coreboot. For example, the type 4 table should have details about your processor manufacturer (Intel) as well as information which implies Baytrail (CPU family, model, and stepping).


CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="xxxxx"
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="yyyy"

Regards
Mayuri

From: David Hendricks [mailto:dhendrix at google.com<mailto:dhendrix at google.com>]
Sent: 14 January 2017 08:19
To: Mayuri Tendulkar <mayuri.tendulkar at aricent.com<mailto:mayuri.tendulkar at aricent.com>>
Cc: coreboot <coreboot at coreboot.org<mailto:coreboot at coreboot.org>>
Subject: Re: [coreboot] SMBIOS table enablement in coreboot

Hi Mayuri,
Do you have GENERATE_SMBIOS_TABLES enabled in your config?

On Fri, Jan 13, 2017 at 12:56 AM, Mayuri Tendulkar <mayuri.tendulkar at aricent.com<mailto:mayuri.tendulkar at aricent.com>> wrote:
Hi
We are using coreboot for our board based on Intel Baytrail 3845.

When we use dmidecode –t to get DDR details, we get empty. It means data is missing in SMBIOS.

Are there any settings in coreboot to enable this?

Regards
Mayuri
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David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
"DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."



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David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
"DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."
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