[coreboot] SVID interface support on Intel Baytrail

[Zoran Stojsavljevic]

I see... It seems that I got the idea. This one I freely share with the
community!

Some MSRs, or some PCIe registers must be enabled on SoC (namely,
integrated in PCH), and they must be enabled at BSP (BIOS/Coreboot) time.

You need to ask INTEL IOTG support to tell to you which ones, so Coreboot
people can get the idea how and where to implement this SVID enabling (MSR
or PCIe space) addendum, in order to enable INTEL user space power tools in
Linux.

I do NOT know which ones (not knowing answer to this question, in
particular, and lazy to investigate), in contrary to previous problem with
enabling Nehalem DDRs. ;-)

Zoran

On Wed, Feb 1, 2017 at 10:23 AM, Mayuri Tendulkar <
mayuri.tendulkar at aricent.com> wrote:

> We want to access this from Linux kernel Ubuntu 14.04.5
>
>
>
> *From:* Zoran Stojsavljevic [mailto:zoran.stojsavljevic at gmail.com]
> *Sent:* 01 February 2017 14:33
> *To:* Mayuri Tendulkar <mayuri.tendulkar at aricent.com>
> *Cc:* coreboot <coreboot at coreboot.org>
> *Subject:* Re: [coreboot] SVID interface support on Intel Baytrail
>
>
>
> > In our design, we are using SVID interface on Intel Baytrail for
> accessing PMIC.
>
>
>
> From where? BIOS? Linux kernel? Which SW package?
>
>
>
> What about EC in these equations?
>
>
>
> Zoran
>
>
>
> On Wed, Feb 1, 2017 at 9:26 AM, Mayuri Tendulkar <
> mayuri.tendulkar at aricent.com> wrote:
>
> Hi
>
>
>
> In our design, we are using SVID interface on Intel Baytrail for accessing
> PMIC.
>
>
>
> But in coreboot, we don’t see any support enabled for this interface for
> Baytrail.
>
>
>
> Does anybody have idea how to access this interface?
>
>
>
> Regards
>
> Mayuri
>
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