[coreboot] Can't disable CONFIG_ENABLE_FSP_FAST_BOOT flag on Intel Baytrail platform

[Naveed Ghori]

Nico,
I faced this same thing earlier I believe.
The reason I disabled it was to stop coreboot from writing to the flash chip. I was advised to turn off CONFIG_ENABLE_FSP_FAST_BOOT and this worked for the flash but had this side affect.

Garrett, Are you disabling it for the same reason?

Regards,
Naveed

-----Original Message-----
From: coreboot [mailto:coreboot-bounces at coreboot.org] On Behalf Of Nico Huber
Sent: Wednesday, 13 December 2017 2:12 AM
To: GARRETT DOORENBOS; coreboot at coreboot.org
Subject: Re: [coreboot] Can't disable CONFIG_ENABLE_FSP_FAST_BOOT flag on Intel Baytrail platform

Hello Garrett,

On 11.12.2017 18:16, GARRETT DOORENBOS wrote:
> I'm running coreboot on an Intel Atom Bay Trail based platform. When I 
> turn off the CONFIG_ENABLE_FSP_FAST_BOOT flag, I get stuck in the 
> Intel FSP (it never returns) after a warm boot. The only way around it 
> is a power cycle. Has anyone seen this before?

AFAICS, the Bay Trail FSP doesn't have such an option. So it might be the case that the binary always expects a non-volative cache. But that is disabled in coreboot if you disable ENABLE_FSP_FAST_BOOT (by chance).
Intel is known to present options where only one value works.

The correct solution seems to be to always `select ENABLE_MRC_CACHE` for fsp_baytrail and remove the related guards in its code. And hide ENABLE_FSP_FAST_BOOT for fsp_baytrail because it just doesn't apply.

May I ask why you want to disable fast boot?

Hope that helps,
Nico

> Hello,
> 
> 
> Thanks,
> Garrett Doorenbos
> Software Engineer - Almost Hardware
> 
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