[coreboot] Can't disable CONFIG_ENABLE_FSP_FAST_BOOT flag on Intel Baytrail platform

Nico Huber nico.h at gmx.de
Tue Dec 12 19:11:33 CET 2017

Hello Garrett,

On 11.12.2017 18:16, GARRETT DOORENBOS wrote:
> I'm running coreboot on an Intel Atom Bay Trail based platform. When I
> turn off the CONFIG_ENABLE_FSP_FAST_BOOT flag, I get stuck in the Intel
> FSP (it never returns) after a warm boot. The only way around it is a
> power cycle. Has anyone seen this before?

AFAICS, the Bay Trail FSP doesn't have such an option. So it might be
the case that the binary always expects a non-volative cache. But that
is disabled in coreboot if you disable ENABLE_FSP_FAST_BOOT (by chance).
Intel is known to present options where only one value works.

The correct solution seems to be to always `select ENABLE_MRC_CACHE`
for fsp_baytrail and remove the related guards in its code. And hide
ENABLE_FSP_FAST_BOOT for fsp_baytrail because it just doesn't apply.

May I ask why you want to disable fast boot?

Hope that helps,

> Hello,
> Thanks,
> Garrett Doorenbos
> Software Engineer - Almost Hardware
> Office: 256.963.6369
> Email: garrett.doorenbos at adtran.com<mailto:garrett.doorenbos at adtran.com>
> Web: www.adtran.com<http://s.bl-1.com/h/CoY1mz9?url=http://www.adtran.com>
> 901 Explorer Boulevard
> Huntsville, AL 35806 - USA
> [ADTRAN]<http://s.bl-1.com/h/CoY1mz9?url=http://www.adtran.com>

More information about the coreboot mailing list