[coreboot] Need help implementing romstage CBMEM

[Kyösti Mälkki]

On Wed, Aug 30, 2017 at 11:39 PM, Keith Hui <buurin at gmail.com> wrote:
> Hi guys,
>
> I'm still hard at work over the venerable (even "almighty" at the
> time) 440BX and Slot 1 boards.
>
> [1] https://review.coreboot.org/c/20977/
>
> And now I'm stuck and thoroughly confused.
>
> My current state is:
> 1. cbmem_initialize_empty() failed to even start allocating the root
> CBMEM entry. No indication why. I tried tracing the code path in the
> sources and still could not find out where exactly it failed. With
> enough fiddling I did get it to complain the way Aaron expected [1].

Please update your work in gerrit, showing all the actual code changes
you try to boot with. This includes changes under mainboard/.

> 2. Using the common Intel CPU cache_as_ram.inc, I can get through
> mainboard romstage and memory init. If I just return a fixed
> CONFIG_TOPMEM in setup_stack_and_mtrrs() like what was done in
> cpu/intel/nehalem, it got past the point of POST_PREPARE_RAMSTAGE and
> then nothing.

All that setup_stack_and_mtrrs() is not really required for
EARLY_CBMEM_INIT, leave all that as followup work. Use unmodified
car/romstage_legacy.c and car/cache_as_ram.inc with that
DCACHE_RAM_BASE fixed.

Disable CBMEM console and timestamps for the time being, as those eat
a lot of your CAR allocation. Those may have smashed your stack in CAR
to the extent of breaking raminit.

> 3. Porting the postcar frame assembly from
> cpu/intel/car/cache_as_ram_ht.inc results in a failure somewhere
> before loading ramstage and after

Push your modified source to gerrit if you want comments on that.

> 4. If I try to run this build under QEMU, it fails with "Trying to
> execute code outside RAM or ROM at 0x000a0000" in 440BX RAM init code
> after dumping the "before" northbridge config, so I can't correctly
> debug it this way either.

Just forget about using QEMU for the task at hand.

Kyösti