[coreboot] Howto enable AMD Cool'n'Quiet support

[Michael Graichen]

Hi Rudolf,


thanks for your answer.

I checked the output and it seems like the CPU is detected correct by coreboot

CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device fc0
CPU: family 0f, model 0c, stepping 00
Enabling cache
CPU ID 0x80000001: fc0
MTRR: Physical address space:


But I have also seen that CONFIG_K8_REV_F_SUPPORT is not set in .config

Do I need to set it? and where ? src/mainboard/asus/k8v-x/Kconfig?


I copied my coreboot.output to https://pastebin.com/raw/yFM1qXxq

and my .config to https://pastebin.com/raw/KH69Vhzg maybe you can see more than me.


Thanks,

Michael




________________________________
Von: Rudolf Marek <r.marek at assembler.cz>
Gesendet: Mittwoch, 16. August 2017 08:41
An: coreboot at coreboot.org; michael.graichen at hotmail.com
Betreff: Re: [coreboot] Howto enable AMD Cool'n'Quiet support

Hi,

> I checked coreboot.rom-file and my vendor BIOS for that but can't find it.

The coreboot provides the _PSS ACPI objects and not that PSB table. I guess you
miss the _PSS objects for some reason.

> Did I miss to enable something in make menuconfig? Can someone give me a hint
> how to find the missing blob.

If your CPU is pre rev F family 0xf, the _PSS object is generated using a
hardcoded table. Perhaps your CPU is missing there. See powernow_acpi.c
coreboot should also complain if the CPU is missing there:

"Unknown CPU, please update the powernow_acpi.c"

Thanks
Rudolf

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot/attachments/20170817/671f9596/attachment.html>