[coreboot] [Broadwell-U]How the eDP, DDI1, DDI2 are enabled?
Zheng Bao
fishbaoz at hotmail.com
Wed Aug 2 08:35:45 CEST 2017
---------------------------------
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
# Enable DDI1 Hotplug with 6ms pulse
register "gpu_dp_b_hotplug" = "0x06"
# Enable DDI2 Hotplug with 6ms pulse
register "gpu_dp_c_hotplug" = "0x06"
# Set backlight PWM values for eDP
register "gpu_cpu_backlight" = "0x00000200"
register "gpu_pch_backlight" = "0x04000200"
# Enable Panel and configure power delays
register "gpu_panel_port_select" = "1" # eDP
register "gpu_panel_power_cycle_delay" = "6" # 500ms
register "gpu_panel_power_up_delay" = "2000" # 200ms
register "gpu_panel_power_down_delay" = "500" # 50ms
register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms
---------------------------------------
I assume SOC has 3 display port, called eDP, DDI1 and DDI2.
The code above enable eDP only. How are the DDI1 and DDI2 enabled?
Zheng
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot/attachments/20170802/f9ba1e89/attachment.html>
More information about the coreboot
mailing list