[coreboot] Experiments with disabling the ME on Sandybridge x230

Trammell Hudson hudson at trmm.net
Mon Sep 12 19:58:43 CEST 2016


On Mon, Sep 12, 2016 at 06:13:16PM +0000, Peter Stuge wrote:
> > If I just erase the first 4KB of its region (0x3000, starts with "$FPT"),
> > coreboot boots up fine and reports that "WARNING: ME has bad firmware".
> > My Linux payload initializes without any complaints.
> 
> Does it stay operational for more than 30 minutes? [...]
> Does it resume after more than 30 minutes from power-on? And from suspend?

Yes, it has been operational for the past few hours and I'm able to
suspend it with 'systemctl suspend' and resume with the lid or power
switch.  I think the lack of entering S3 on lid-closure might be a Qubes
3.2-rc regression, so I'm ignoring that for now.

> [...]
> > The indicator on the power button will flash when I press it,
> 
> That is an LED connected to the EC, unrelated to the x86 platform.

That makes sense.  I also note that if I have the device on external
power the light stays on, but there is no external sign of life.

> > but the system does not seem to respond otherwise (I do not
> > have a port 80 debugger or hardware serial port to see where
> > it is failing).
> 
> To look into the ME in a lot of detail I think you may need to get
> involved with the hardware.

What hardware probes would you recommend?  Do you know of any easy
place to attach them?  The x230 has a second mini-pcie slot available
if there are useful debugging devices.

Here's the relevant sections from the 'cbmem --console' -- the early ME init
routines appear to find a bad partition table, but for some reason the
later call to intel_me_status() reports it as ok. I don't see any sort of
backup $FPT structure in the ROM, so I'm not sure what is it using.


coreboot-4.4-1458-gae58906-heads Fri Sep  9 15:14:17 UTC 2016 romstage starting...
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Initializing Graphics...
Back from sandybridge_early_initialization()
SMBus controller enabled.
CPU id(306a9): Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz
AES supported, TXT supported, VT supported
PCH type: QM77, device id: 1e55, rev id 4
Intel ME early init
WARNING: ME has bad firmware
ME: Requested 32MB UMA
ME: FW Partition Table      : BAD
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Waiting for DID BIOS message
ME: FWS2: 0x101f016a
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x1
ME:  Invoke MEBx     : 0x1
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x1
ME:  MFS failure     : 0x1
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x1
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x1f
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
PASSED! Tell ME that DRAM is ready

[...]

XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 205 usecs
PCI: 00:16.0 init ...
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Reset
ME: Current Operation State : Preboot
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : ROM Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : BEGIN
intel_me_path: mbp is not ready!
ME: BIOS path: Error

-- 
Trammell



More information about the coreboot mailing list