[coreboot] Fixing payload address
hudson at trmm.net
Fri Oct 28 18:39:11 CEST 2016
I'm working with a fairly large Linux payload in my coreboot image
and one of my targets (the x230) has two separate ROM chips. I'd like
to have the top 4 MB SPI flash reserved for coreboot (bootblock,
romstage, ramstage, mrc, etc) and the bottom 8 MB chip just for
Most of my changes now are in the payload, not in the coreboot
components, so ideally I would not need to touch the top 4 MB
chip at all. I can't figure out a way to ask CBFS to create
two sections like this for me. Is it possible?
As a secondary improvement, I'd like to have an even more minimal
Linux payload in the top 4 MB that has spiflash tools to re-write
the bottom 8 MB. Is there an easy way to select which payload
will be executed?
More information about the coreboot