[coreboot] Any one have a experence the coreboot with u-boot?

[Simon Glass]

+U-Boot and Bin

On 29 November 2016 at 15:25, Julius Werner <jwerner at chromium.org> wrote:
> edit: forgot the mailing list
>
> On Tue, Nov 29, 2016 at 2:24 PM, Julius Werner <jwerner at chromium.org> wrote:
>> +Simon who maintains the U-Boot x86 port and might be interested
>>
>> In general, this sounds like a U-Boot problem more than a coreboot
>> problem (since you're clearly getting into U-Boot code execution), and
>> you'd probably have better luck asking on the U-Boot mailing lists for
>> help.
>>
>> On Mon, Nov 28, 2016 at 12:22 AM, 김유석 <poplinux0 at gmail.com> wrote:
>>> Dear Sir.
>>>
>>> My env is see below.
>>>
>>>   board : Intel rangeley MOHON PEAK.(CPU is C2358)
>>>
>>>
>>> I was success boot coreboot + SeaBIOS.
>>>
>>> This time, I'm try to boot coreboot + u-boot(16.05).
>>>
>>> But u-boot is every time fail. log is see below.
>>>
>>>
>>>   U-Boot 2016.05-rc3 (Nov 28 2016 - 17:04:31 +0900)
>>>
>>>   CPU: x86_64, vendor Intel, device 406d8h
>>>   DRAM:  4 GiB
>>>
>>>   dm_pci_hose_probe_bus: Internal error, bus 'pch at 1,0' got seq 0, expected 1

This says that U-Boot is scanning a bridge and expects to to be bus
number 1, but it is bus number 0. I'm not quite sure how this can
happen. Try 'dm tree' to list the devices. Or put a call to
dm_dump_all() in dm_pci_hose_probe_bus().

>>>   Using default environment
>>>
>>>   Video: No video mode configured in coreboot!

This is because you need to enable the display in coreboot (if you want to).

>>>   Model: QEMU x86 (I440FX)

Here you are using the qemu board. You might want to create a new
device tree file. If you see qemu-x86_i440fx.dts you may need to
change the PCH address?

>>>
>>>   dm_pci_hose_probe_bus: Internal error, bus 'pch at 1,0' got seq 0, expected 1
>>>   initcall sequence 7fc59100 failed at call 01110185 (err=-32)
>>>   ### ERROR ### Please RESET the board ###

You can use:

   grep 7fc59100 System.map

to find the function that is failing. But I'm pretty sure it is
because of the PCI problem, since it returns -EPIPE.

>>>
>>>
>>> Every time occured fail on the interrupt_init().
>>>
>>> But I don't have a solution.
>>>
>>>
>>> I was attached the config of corebooe and u-boot.
>>>
>>>
>>> Please advise to me.

Can you explain why you are using coreboot first? Is it because you
don't want to support this platform on U-Boot? It would be more work,
at least unless you have an FSP.

I talked with one of the coreboot guys about setting up a U-Boot
config that reads everything it needs from coreboot, instead of
requiring its own configuration. Then we would not have these
problems. However I haven't actually worked on this as I don't
actually have a board that fails...maybe soon.

>>>
>>>
>>> Thank you.


Regards,
Simon

>>>
>>>
>>>
>>>
>>>
>>>
>>> --
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>>> https://www.coreboot.org/mailman/listinfo/coreboot