[coreboot] Nehalem not booting with two ram sticks
Federico Amedeo Izzo
federico.izzo42 at gmail.com
Wed Nov 23 09:58:03 CET 2016
Thank you all for your support,
My x201 is a Nehalem architecture, not IVB (Ivy Bidge I suppose)
On 11/23/2016 02:40 AM, Charlotte Plusplus wrote:
> On Tue, Nov 22, 2016 at 4:28 PM, Zoran Stojsavljevic
> <zoran.stojsavljevic at gmail.com <mailto:zoran.stojsavljevic at gmail.com>>
> If MCU is later, could you, please, explain how you did this in
> IVB Coreboot code (since this might be beneficial to Federico's
> Edit devicetree.cb and set:
> register "max_mem_clock_mhz" = "666"
I've looked inside `src/mainboard/lenovo/x201/devicetree.cb` but the
option "max_mem_clock_mhz" is missing,
while it is present in other sandy bridge mainboards.
So I think the actual `raminit.c` of nehalem does not allow choosing a
fixed frequency for RAM.
> Here I understood that you tried to compare IVB raminit.c source
> code with MRC algorithm, embedded in BIOS itself. And I have here
> one ignorant question: what is the difference between IVB (I
> assumed in this case SNB (tock), since I could not find IVB (tick)
> in rc/northbridge/intel/) raminit.c source code and MRC from IVB
> BIOS (there MUST be some difference, it is obvious, doesn't it)?
> I suppose there is one. I don't know. I want to investigate. I will
> certainly try again by adding the patches suggested by Kyosti. As soon
> as I can get the MRC blob to work, I can make some better guesses
> about what is going wrong (I tried so many various things already) by
> having some reference points.
About trying with MRC blob RAM init, sadly the source file
`raminit_mrc.c` present for SNB is absent from
So I think MRC blob init has not been coded/is not supported in nehalem :(
This is confirmed by this wiki page:
So the options of fixing frequency or using MRC are not feasible on
nehalem at the moment.
I will try to check the RAM settings running the Lenovo bios and see if
i can add the code for "max_mem_clock_mhz"
Unfortunately I won't be able to flash coreboot until friday because my
laptop needs an external power supply for the flash chip
and I will borrow it on friday.
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