[coreboot] Intel Braswell FSP graphics init

Andreas Galauner andreas at galauner.de
Wed Nov 9 02:07:14 CET 2016

On 08.11.2016 20:02, Andreas Galauner wrote:
> On 08.11.2016 19:07, Aaron Durbin wrote:
>> Do you have CONFIG_GOP_SUPPORT enabled?
> Yes. That's enabled.
> I can also see a pointer to the VBT data being passed to the FSP and the
> data looks valid.
> That's why I don't get why it doesn't configure the graphics device.

Just a quick followup on the issue: It's working now.
It was a problem with the pinmuxing. Coreboot configures the muxes after
the SiliconInit call of the FSP and I needed a different config for the
DDC- and Hotplug-Detect-Pins.

I created a small pad config table for all the pins that are related to
the video output and passed that to GpioPadInitTablePtr in the
parameters for SiliconInit.

Now it configures the IGD if it detects a valid display on one of the
two outputs on the board.

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