[coreboot] Guidance for adding SuperIO support

Andrew Barnes Andrew.Barnes at Renishaw.com
Thu May 26 13:21:42 CEST 2016


I'm new to coreboot. I would like to have it working on the following

* Fujitsu D3231  (Q87)
* Intel   DQ87PG (Q87)
* Intel   DQ67OW (Q67)
* Intel   DQ45CB (Q45)

Focusing on the first 3, which are all core-i systems, sandybridge and
haswell. I *believe* that coreboot would already support the CPU and

(If that is correct?)

However, the SuperIO I know is not supported. They are respectively:

* SMSC SCH5636, devid '0xc7', kdriver 'sch5636'
* NCT6683D-T, devid '0xc730', kdriver 'nct6683'
* W83677HG-I, devid '0xb470', kdriver 'w83627ehf'
* WPCD377I, devid '0xf1', kdriver 'not-a-sensor'?

I know that these chips are supported in the kernel/lm_sensors. So
perhaps all the info I need to add the support into coreboot is already

However, I'm not entirely sure how best to go about this. I don't
really understand what needs to be achieved or how.

I need some guidance to figure this out, is there an good example I
could follow where by a driver from kernel/lm_sensors has been ported
into coreboot?

If I port the superIO chip successfully, is the next stage to simply
create a board which combines the 3 components CPU,Chipset and SIO? or
am I underestimating this?

Could anyone possibly comment on how much work this will be? The
SuperIO support files don't look that indepth, however if that were
true, and if all the info required is already in the kernel - I wonder
why coreboot doesn't already implement the same list in the kernel.


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