[coreboot] Coreboot image and seabios payload with debug symbols

[Zoran Stojsavljevic]

Hello Mayuri,

[3] The other way how to use ITP BlueBox XDP3 is to use ISS (INTEL System
Studio).

I guess, there is 30 day free trial for ISS (on the intel.com public web,
there is an ISS download somewhere), but if you would like to have ISS
activated, you need to contact ISS INTEL support.

Hope this helps,
Zoran

On Thu, May 12, 2016 at 9:38 AM, Mayuri Tendulkar <
mayuri.tendulkar at aricent.com> wrote:

> Thanks. I will check that.
>
> But I didn’t get 3rd point completely.
>
>
>
> *From:* Zoran Stojsavljevic [mailto:zoran.stojsavljevic at gmail.com]
> *Sent:* 12 May 2016 12:18
> *To:* Mayuri Tendulkar <mayuri.tendulkar at aricent.com>;
> coreboot at coreboot.org
>
> *Subject:* Re: [coreboot] Coreboot image and seabios payload with debug
> symbols
>
>
>
> Hello Mayuri,
>
>
>
> Sorry, I am busy with some other things (trying to perfect my Deutsch
> Sprache, and this goes too slow, and too pejorative)... :-(
>
>
>
> I did not look thru the second document, but here is what I'll advise
> here:
>
> [1] Go to
> https://gcc.gnu.org/onlinedocs/gcc-4.8.0/gcc/Debugging-Options.html and
> find how to compile Coreboot with debug and maximum warnings. Not sure, -D
> is for debug, -O for the warnings.
>
> [2] From www.intel.com/fsp, use the following Debug FSP, included in the
> package from: *Intel® Atom™ processor E3800 product family *(formerly Bay
> Trail, Compliant with FSP v1.0 Specification)
>
> [3] You do need to use DAL/PDT ITP2 package for your XDP3 (60 pin
> connector), since for BYT family only ITP2 SW is available (legacy ITP
> disconnected).
>
>
>
> Later...
>
>
>
> Zoran
>
>
>
>
>
> On Thu, May 12, 2016 at 7:44 AM, Mayuri Tendulkar <
> mayuri.tendulkar at aricent.com> wrote:
>
> Hi Zoran
>
>
>
> Can you please update on this?
>
>
>
> Can we build using debug FSP and gdb enabling?
>
>
>
> Regards
>
> Mayuri
>
>
>
> *From:* Mayuri Tendulkar
> *Sent:* 11 May 2016 10:02
> *To:* 'Zoran Stojsavljevic' <zoran.stojsavljevic at gmail.com>
> *Cc:* coreboot at coreboot.org
> *Subject:* Re: [coreboot] Coreboot image and seabios payload with debug
> symbols
>
>
>
> Hi Zoran
>
>
>
> Please find responses:
>
>
>
> [1] When you do refer to *"**Intel system debugger",* do you refer to
> INTEL ITP2 debugger, with Blue Box XDP 60 pin HW connector (
> http://m.eet.com/media/1073715/JTAG_101_fig5.jpg)?
>
>
>
> This is Intel® ITP-XDP3.
> https://software.intel.com/sites/default/files/managed/45/19/10-jtag-debugger.pdf
>
>
>
>
>
> [2] For which CPU/SoC/platform you would like to use [1]? – This I am
> currently using for Minnowboard Turbot (E3826 dual core)
>
>
>
> [3] Seems that you did copy some debug excerpt from some INTEL document...
> I guess, this one is public one. Could you, please, attach this (if?)
> public document to this @ thread for our review, or either pass to us www
> pointer to this document?
>
>
>
> This can be found from Intel system debugger use guide.
>
> https://software.intel.com/en-us/node/592929- check section debugging
> basics
>
>
>
> Regards
>
> Mayuri
>
>
>
>
>
> *From:* Zoran Stojsavljevic [mailto:zoran.stojsavljevic at gmail.com
> <zoran.stojsavljevic at gmail.com>]
> *Sent:* 10 May 2016 23:15
> *To:* Mayuri Tendulkar <mayuri.tendulkar at aricent.com>
> *Cc:* coreboot at coreboot.org
> *Subject:* Re: [coreboot] Coreboot image and seabios payload with debug
> symbols
>
>
>
> Hello Mayuri,
>
>
>
> Few questions, may I?
>
>
>
> [1] When you do refer to *"**Intel system debugger",* do you refer to
> INTEL ITP2 debugger, with Blue Box XDP 60 pin HW connector (
> http://m.eet.com/media/1073715/JTAG_101_fig5.jpg)?
>
>
>
> [2] For which CPU/SoC/platform you would like to use [1]?
>
>
>
> [3] Seems that you did copy some debug excerpt from some INTEL document...
> I guess, this one is public one. Could you, please, attach this (if?)
> public document to this @ thread for our review, or either pass to us www
> pointer to this document?
>
>
>
> Thank you,
>
> Zoran
>
>
>
> On Tue, May 10, 2016 at 8:22 AM, Mayuri Tendulkar <
> mayuri.tendulkar at aricent.com> wrote:
>
> Hi
>
>
>
> I want to use Intel system debugger to do coreboot source level debugging.
>
>
>
> So I need below. Can you please help me in this?
>
> To debug your software using source code you need to load debug
> information that is used to map the program in target memory to the
> original source files. To do this the debugger needs the following:
>
>    - A program loaded in target memory that has been compiled with debug
>    information
>    - The load address of the program in target memory
>    - The program binary file (executable file)
>    - Debug information file for the program binary (also referred to as
>    "symbols")
>    - Original program source code
>
> Regards
>
> Mayuri
>
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