[coreboot] how to route IRQ4 (COM1) on LPC bus for bayleybay_fsp
benoit.sansoni at gmail.com
Tue Jan 12 21:32:09 CET 2016
I am currently running coreboot + fsp on a E3837 cpu based platform.
My platform has serial line in a LPC device.
Firstly, I activated the SERIRQ in continous mode.
Nevertheless under operating system, the IRQ4 for COM1 is not available.
I checked out the file src/mainboard/intel/bayleybay_fsp/irqtable.h
And I saw that for the LPC interface :
PCI_DEV_PIRQ_ROUTE(PCU_DEV, H, G, B, C)
#define PIRQ_PIC_ROUTES \
PIRQ_PIC(A, 4), \
PIRQ_PIC(B, 5), \
PIRQ_PIC(C, 7), \
PIRQ_PIC(D, 10), \
PIRQ_PIC(E, 11), \
PIRQ_PIC(F, 12), \
PIRQ_PIC(G, 14), \
I know that this configuration is available from the ILB_BASE_ADDRESS
But I don't really understand, how to route the IRQ4 from LPC dev.
Is someone can explain to me how to do it properly?
Many thanks in advance
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