[coreboot] coreboot solidpc

sebastien basset sbhome1 at gmail.com
Wed Dec 14 14:19:48 CET 2016


i have a post-code when call FspMemoryInit of FSP, do you know post-code
FSP, how to retrieve post-code generated by FSP intel ?

2016-12-14 14:15 GMT+01:00 sebastien basset <sbhome1 at gmail.com>:

> Hi,
>
> For flashing board solidpc,
> 1/  plug power supply (without pressing the power button)
> 2/ connect dediprog on j8 connector( with good cable)
> 3/ ./flashrom -p dediprog:voltage=1.8V -w solidrun.rom
>
> i'am working on tag 4.5 coreboot.
>
> Sébastien
>
>
> Le 14 déc. 2016 12:39, "Piotr Król" <piotr.krol at 3mdeb.com> a écrit :
>
>> On Wed, Dec 14, 2016 at 10:24:10AM +0100, sebastien basset wrote:
>> > Hello,
>>
>> Hi Sebastien,
>>
>> >
>> > i ve began porting coreboot to solidpc. Have you coreboot working for
>> solidPC,
>> > today ?
>>
>> I would be glad to help you with that. I have SolidPC 1.2. Unfortunately
>> had problem with setting up with DediProg SF100 and flashrom. What is
>> you flashing method ?
>>
>> > For now, i am stuck in the init of the ram, in call FspMemoryInit:
>> >
>> > coreboot-4.5-4-gca220c0-dirty Wed Nov 30 13:43:19 UTC 2016 romstage
>> starting...
>> > FSP TempRamInit successful bist: 0x00000000 tsc: 0x0000000000031628
>> POST: 0x30
>> > CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS:
>> Locating
>> > 'cpu_microcode_blob.bin' CBFS: Found @ offset 4be80 size 10c00
>> microcode: sig=
>> > 0x406c4 pf=0x1 revision=0x403 CONFIG_MMCONF_BASE_ADDRESS: 0xe0000000
>> Using FSP
>> > 1.1 FSP_INFO_HEADER: fff6e094 FSP Signature: $BSWFSP$ FSP Header
>> Version: 2 FSP
>> > Revision: 1.1.2.0 pm1_sts: 8900 pm1_en: 0000 pm1_cnt: 00000000 gpe0_sts:
>> > 00000000 gpe0_en: 00000000 tco_sts: 00000000 prsts: 00330910 gen_pmcon1:
>> > 00245209 gen_pmcon2: 00000000 prev_sleep_state 5 CBFS: 'Master Header
>> Locator'
>> > located CBFS at [700100:7fffc0) CBFS: Locating 'spd.bin' CBFS: Found @
>> offset
>> > 1e0c0 size 400 ram_id=10, total_spds: 4 POST: 0x32 POST: 0x33 FMAP:
>> Found
>> > "FLASH" version 1.1 at 700000. FMAP: base = ff800000 size = 800000
>> #areas = 3
>> > No MRC cache found. POST: 0x34 VPD Data: 0xfff9839c UPD Data: 0xfff983b0
>> > Updating UPD values for MemoryInit POST: 0x36 Calling FspMemoryInit:
>> 0xfffb580f
>> > 0x00000000: NvsBufferPtr 0xfef03e2c: RtBufferPtr 0xfef03dd4: HobListPtr
>> POST:
>> > 0x92
>>
>> Can I assume this is recent master ?
>>
>> Best Regards,
>> --
>> Piotr Król
>> Embedded Systems Consultant
>> http://3mdeb.com | @3mdeb_com
>>
>


-- 
Sébastien Basset
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