[coreboot] your preferred method for supplying power to chip for RPi spi flashing?

Peter Stuge peter at stuge.se
Thu Dec 1 14:15:59 CET 2016


Michael Carbone wrote:
> I have been attempting to use a raspberry pi for spi flashing and when I
> use the 3.3v pin the raspberry pi doesn't power up as the chip draws too
> much power through the 3.3v pin for the raspberry pi to also run.

It's not the flash chip drawing current, it's the rest of the mainboard.

A PC mainboard has 10-20 different voltages. The 3.3 V rail with the
flash chip is only one of them. Each platform (CPU+chipset) defines a
strict sequence and timing for turning voltages on, for the platform
to function correctly.

If the mainboard is otherwise unpowered and the 3.3 V rail is connected
to an external supply then that sequence and the timing is guaranteed to
be violated. This could cause anything from permanent hardware damage
(maybe unlikely, but certainly possible) to random malfunction, e.g.
excessive current draw, as long as the outside supply is connected.


> What is your recommended method for powering the chip and RPi?
> 
> Looking online [1] some folks recommend using laptop AC adapter +
> wake-on-lan (and not using the VCC/3.3v pin), but I'm not sure
> that's a dependable strategy

In fact I consider it the *only* dependable strategy. It is the
obvious way to adhere to the required power up sequence.

The next question becomes - how to ensure that the SPI bus master is
not driving the SPI bus, when the mainboard is powered?

This requires some platform- and possibly mainboard-specific research
into exactly how the SPI master powers up.

On i945 platforms (X60, T60), the 3.3 V rail is active whenever the AC
adapter is connected, also when the system is off. Very handy. On
other platforms that's not neccessarily the case, and some tricks can
and will be needed to get 3.3 V up but keep the SPI master in reset,
hoping that will make its SPI output pins high-impedance, rather than
drive 0 or 1. The latter would cause a short circuit if the external
SPI programmer drives the opposite level.


The correct solution to having two SPI masters with a single slave
(flash chip) is to insert a bus switch before the slave, so that only
one master can access the flash at any given time. This requires
moving the flash chip off the mainboard onto an adapter PCB with the
bus switch on it. There exists an open design for such an adapter PCB
already, but I don't know off the top of my head who made it.
Hopefully the author or someone else (lynxis?) can post the link.


Thanks

//Peter



More information about the coreboot mailing list