[coreboot] Where is the first instrucion?

ron minnich rminnich at gmail.com
Tue Aug 9 18:44:06 CEST 2016


I have not read this thread closely and maybe I'm telling you something you
know. But I want to warn you about CD. I know it is named 'cache disabled'
but that's not quite what it means.

I'm trying and failing to find the original slide deck from the UNM grad
student (and intel employee) who first implemented our cache as ram in
2005. His point to me was that CD doesn't *really* mean cache hardware is
disabled, just that it changes cache hardware behavior such that refills
from memory are disabled. If there are valid tags in the cache then loads
that hit those tags will work. So the task for CAR on x86 is to create
valid tags, then set CD. His point was the breakthrough for me on
understanding CAR on x86. Ollie Lo and I had been stuck on this point for a
while, we kept thinking we could not set CD and have CAR work; in fact,
setting CD is part of ensuring CAR works. The Intel employee's point was
"you have to read between the lines in section III".

you can
git grep DO.NOT.INVALIDATE
for a few comments on this and it may help.

Basically, in the classic car we got in 2005, the steps on x86 are:
enable cache
do references to set tags
disable cache (really!)
then cache as ram works.

Things have changed on some CPUs since then and we now even have
chipset-dependent x86 CAR code but I suspect the basic idea remains the
same on x86.

You may already know this, just wanted to make sure.

ron
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20160809/8de285f4/attachment-0001.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: pasted1
Type: image/png
Size: 124348 bytes
Desc: not available
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20160809/8de285f4/attachment-0001.png>


More information about the coreboot mailing list