[coreboot] Broadwell IGD (on Auron_Paine)

Georg Wicherski gw at oxff.net
Mon Oct 19 17:39:09 CEST 2015


Hi,

thanks to Marc Jones' SGD patch for the Auron board
(f3214d02482a4104d7276f06d6b326b2a54c4262), I was able to get my
Auron_Paine up to ramstage.

Unfortunately, the IGD code in soc/intel/broadwell/ appears to be
somewhat broken. Based off Aaron's guidance on IRC, I've pin-pointed the
issue to be within igd_setup_panel . The first gtt_read there seems to
hang already (BIOS_SPEW log attached). Find my current code with those
debug prints at <http://review.coreboot.org/#/c/11907/2>. FWIW, I've
tested with some commenting-out, etc. that it's any gtt_read that
immediately causes a hang there. Also dumped the gtt_res, small excerpt
from the log:

--8<--
igd's gtt_res = { base=e0000000, size=1000000, limit=e0ffffff,
flags=60000201 }
igd_init: waited for pre-graphics delay to pass
igd_init: went through early init
igd_init: RP1 graphics frequency is set
gtt_read(PCH_PORT_HOTPLUG)
--8<--

People on IRC mentioned that this is an issue that people may have run
into before on Broadwell, any suggestions on how to fix the hang there?


Thanks,
G
-------------- next part --------------
ÀUSB


coreboot-4.1-757-g354d2c3-dirty Thu Oct 15 17:53:02 UTC 2015 romstage starting...
PM1_STS:   0110
PM1_EN:    0000
PM1_CNT:   00000000
TCO_STS:   0000 0000
GPE0_STS:  1ef86df0 147dcfdf 0005f240 00000000
GPE0_EN:   00000000 00000000 00000000 00000000
GEN_PMCON: 0200 2024 4206
Previous Sleep State: S5
CPU: Intel(R) Celeron(R) 3205U @ 1.50GHz
CPU: ID 306d4, Broadwell E0 or F0, ucode: 0000001f
CPU: AES NOT supported, TXT NOT supported, VT supported
MCH: device id 1604 (rev 08) is Broadwell E0
PCH: device id 9cc5 (rev 03) is Broadwell U Base
IGD: device id 1606 (rev 08) is Broadwell U GT1
CPU: frequency set to 1500 MHz
SPD: index 5 (GPIO47=1 GPIO9=0 GPIO13=1)
CBFS @ 400000 size 3ff8c0
CBFS: Locating 'spd.bin'
CBFS: Found @ offset 25d00 size 1000
SPD: module type is DDR3
SPD: module part is HMT425S6AFR6A-PB  
SPD: banks 8, ranks 1, rows 15, columns 10, density 4096 Mb
SPD: device width 16 bits, bus width 64 bits
SPD: module size is 2048 MB (per channel)
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Pseudo-global reset
ME: Progress Phase State    : Waiting for DID BIOS message
ME: HSIO Version            : 8705 (CRC 0xfbc2)
No MRC cache found.
CBFS @ 400000 size 3ff8c0
CBFS: Locating 'mrc.bin'
CBFS: Found @ offset 39ffc0 size 3669c
Starting Memory Reference Code
Initializing Policy
Installing common PPI
MRC: Starting...
Initializing Memory
MRC: Done.
MRC Version 2.4.0 Build 1
memcfg DDR3 clock 1600 MHz
memcfg channel assignment: A: 0, B  1, C  2
memcfg channel[0] config (00780008):
   enhanced interleave mode on
   rank interleave on
   DIMMA 2048 MB width x16 single rank, selected
   DIMMB 0 MB width x16 single rank
memcfg channel[1] config (00600000):
   enhanced interleave mode on
   rank interleave on
   DIMMA 0 MB width x8 or x32 single rank, selected
   DIMMB 0 MB width x8 or x32 single rank
CBMEM:
IMD: root @ 7bfff000 254 entries.
IMD: root @ 7bffec00 62 entries.
External stage cache:
IMD: root @ 7c3ff000 254 entries.
IMD: root @ 7c3fec00 62 entries.
MRC data at ff7d0d9c 6246 bytes
Relocate MRC DATA from ff7d0d9c to 7bf7b000 (6246 bytes)
create cbmem for dimm information
TPM initialization.
TPM: Init
Found TPM SLB9635 TT 1.2 by Infineon
TPM: Open
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: OK.
CBFS provider active.
CBFS @ 400000 size 3ff8c0
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 3b200 size 1364a
'fallback/ramstage' located at offset: 43b238 size: 1364a
Decompressing stage fallback/ramstage @ 0x7bf3afc0 (241232 bytes)
Loading module at 7bf3b000 with entry 7bf3b000. filesize: 0x29e98 memsize: 0x3ae10
Processing 2712 relocs. Offset value of 0x7be3b000
USB


coreboot-4.1-757-g354d2c3-dirty Thu Oct 15 17:53:02 UTC 2015 ramstage starting...
Moving GDT to 7bf39000...ok
Normal boot.
BS: BS_PRE_DEVICE times (us): entry 5 run 5 exit 4
BS: BS_DEV_INIT_CHIPS times (us): entry 5 run 8 exit 5
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:13.0: enabled 0
PCI: 00:14.0: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:15.4: enabled 0
PCI: 00:15.5: enabled 0
PCI: 00:15.6: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:17.0: enabled 0
PCI: 00:19.0: enabled 0
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 0c31.0: enabled 1
PNP: 0c09.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:03.0: enabled 1
  PCI: 00:13.0: enabled 0
  PCI: 00:14.0: enabled 1
  PCI: 00:15.0: enabled 1
  PCI: 00:15.1: enabled 1
  PCI: 00:15.2: enabled 1
  PCI: 00:15.3: enabled 0
  PCI: 00:15.4: enabled 0
  PCI: 00:15.5: enabled 0
  PCI: 00:15.6: enabled 0
  PCI: 00:16.0: enabled 1
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:17.0: enabled 0
  PCI: 00:19.0: enabled 0
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
  PCI: 00:1c.1: enabled 0
  PCI: 00:1c.2: enabled 0
  PCI: 00:1c.3: enabled 0
  PCI: 00:1c.4: enabled 0
  PCI: 00:1c.5: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 0c31.0: enabled 1
   PNP: 0c09.0: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 0
  PCI: 00:1f.6: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0000] ops
PCI: 00:00.0 [8086/1604] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/1606] enabled
PCI: 00:03.0 [8086/0000] ops
PCI: 00:03.0 [8086/160c] enabled
PCI: 00:13.0: Disabling device
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/9cb1] enabled
PCI: 00:15.0 [8086/0000] ops
PCI: 00:15.0 [8086/9ce0] enabled
PCI: 00:15.1 [8086/0000] ops
PCI: 00:15.1 [8086/9ce1] enabled
PCI: 00:15.2 [8086/0000] ops
PCI: 00:15.2 [8086/9ce2] enabled
PCI: 00:15.3: Disabling device
PCI: 00:15.4: Disabling device
PCI: 00:15.5: Disabling device
PCI: 00:15.6: Disabling device
PCI: 00:16.0 [8086/0000] ops
PCI: 00:16.0 [8086/9cba] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:17.0: Disabling device
PCI: 00:19.0: Disabling device
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/9ca0] enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCIe Root Port 1 ASPM is enabled
PCI: 00:1c.0 [8086/9c90] enabled
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/9c92] disabled
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/9c94] disabled
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/9c96] disabled
PCI: 00:1c.4 [8086/0000] bus ops
PCI: 00:1c.4 [8086/9c98] disabled
PCI: 00:1c.5 [8086/0000] bus ops
PCI: 00:1c.1: Disabling device
PCI: 00:1c.2: Disabling device
PCI: 00:1c.3: Disabling device
PCI: 00:1c.4: Disabling device
PCI: 00:1c.5: Disabling device
PCH: RPFN 0x00543210 -> 0x00dcba90
PCI: 00:1c.5 [8086/9c9a] disabled
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/9ca6] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/9cc5] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/9c83] enabled
PCI: 00:1f.3: Disabling device
PCI: 00:1f.6 [8086/9ca4] enabled
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [8086/08b1] enabled
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0x40
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
L1 Sub-State supported from root port 28
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x1e, Power On Scale = 0x0
Capability: type 0x10 @ 0x40
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0x40
ASPM: Enabled L1
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
PNP: 0c31.0 enabled
PNP: 0c09.0 enabled
scan_lpc_bus for PCI: 00:1f.0 done
root_dev_scan_bus for Root Device done
done
BS: BS_DEV_ENUMERATE times (us): entry 5 run 411244 exit 4
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xf0000000-0xf3ffffff.
mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.
MC MAP: TOM: 0x80000000
MC MAP: TOUUD: 0x7f000000
MC MAP: MESEG_BASE: 0x7f000000
MC MAP: MESEG_LIMIT: 0x7fff0fffff
MC MAP: REMAP_BASE: 0x7ffff00000
MC MAP: REMAP_LIMIT: 0xfffff
MC MAP: TOLUD: 0x7f000000
MC MAP: BGSM: 0x7c800000
MC MAP: BDSM: 0x7d000000
MC MAP: TESGMB: 0x7c000000
MC MAP: GGC: 0x1c1
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1d.0 EHCI BAR hook registered
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48
   PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68
   PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40
   PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420
   PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408
   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
   PCI: 00:00.0 resource base c0000 size 7bf40000 align 0 gran 0 limit 0 flags e0004200 index 1
   PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2
   PCI: 00:00.0 resource base 7c800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3
   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 4
   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 5
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:03.0
   PCI: 00:03.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:13.0
   PCI: 00:14.0
   PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
   PCI: 00:15.0
   PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:15.1
   PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:15.2
   PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:15.3
   PCI: 00:15.4
   PCI: 00:15.5
   PCI: 00:15.6
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 20 align 5 gran 5 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:17.0
   PCI: 00:19.0
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 0c31.0
   PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
   PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48
   PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40
    PNP: 0c31.0
    PNP: 0c31.0 resource base a size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
    PNP: 0c09.0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 8000 align 15 gran 15 limit ffffffff flags 200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 20 *  [0x0 - 0x3f] io
PCI: 00:1f.2 20 *  [0x40 - 0x5f] io
PCI: 00:1f.2 10 *  [0x60 - 0x67] io
PCI: 00:1f.2 18 *  [0x68 - 0x6f] io
PCI: 00:1f.2 14 *  [0x70 - 0x73] io
PCI: 00:1f.2 1c *  [0x74 - 0x77] io
DOMAIN: 0000 io: base: 78 size: 78 align: 6 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0x1fff] mem
PCI: 00:1c.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem
PCI: 00:14.0 10 *  [0x11100000 - 0x1110ffff] mem
PCI: 00:1f.2 24 *  [0x11110000 - 0x11117fff] mem
PCI: 00:03.0 10 *  [0x11118000 - 0x1111bfff] mem
PCI: 00:1b.0 10 *  [0x1111c000 - 0x1111ffff] mem
PCI: 00:15.0 10 *  [0x11120000 - 0x11120fff] mem
PCI: 00:15.0 14 *  [0x11121000 - 0x11121fff] mem
PCI: 00:15.1 10 *  [0x11122000 - 0x11122fff] mem
PCI: 00:15.1 14 *  [0x11123000 - 0x11123fff] mem
PCI: 00:15.2 10 *  [0x11124000 - 0x11124fff] mem
PCI: 00:15.2 14 *  [0x11125000 - 0x11125fff] mem
PCI: 00:1f.6 10 *  [0x11126000 - 0x11126fff] mem
PCI: 00:1d.0 10 *  [0x11127000 - 0x111273ff] mem
PCI: 00:16.0 10 *  [0x11127400 - 0x1112741f] mem
DOMAIN: 0000 mem: base: 11127420 size: 11127420 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
constrain_resources: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
constrain_resources: PCI: 00:00.0 01 base 000c0000 limit 7bffffff mem (fixed)
constrain_resources: PCI: 00:00.0 02 base 7c000000 limit 7c7fffff mem (fixed)
constrain_resources: PCI: 00:00.0 03 base 7c800000 limit 7effffff mem (fixed)
constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 48 base 00001400 limit 000017ff io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001800 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff
Setting resources...
DOMAIN: 0000 io: base:1800 size:78 align:6 gran:0 limit:ffff
PCI: 00:02.0 20 *  [0x1800 - 0x183f] io
PCI: 00:1f.2 20 *  [0x1840 - 0x185f] io
PCI: 00:1f.2 10 *  [0x1860 - 0x1867] io
PCI: 00:1f.2 18 *  [0x1868 - 0x186f] io
PCI: 00:1f.2 14 *  [0x1870 - 0x1873] io
PCI: 00:1f.2 1c *  [0x1874 - 0x1877] io
DOMAIN: 0000 io: next_base: 1878 size: 78 align: 6 gran: 0 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:d0000000 size:11127420 align:28 gran:0 limit:efffffff
PCI: 00:02.0 18 *  [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:02.0 10 *  [0xe0000000 - 0xe0ffffff] mem
PCI: 00:1c.0 20 *  [0xe1000000 - 0xe10fffff] mem
PCI: 00:14.0 10 *  [0xe1100000 - 0xe110ffff] mem
PCI: 00:1f.2 24 *  [0xe1110000 - 0xe1117fff] mem
PCI: 00:03.0 10 *  [0xe1118000 - 0xe111bfff] mem
PCI: 00:1b.0 10 *  [0xe111c000 - 0xe111ffff] mem
PCI: 00:15.0 10 *  [0xe1120000 - 0xe1120fff] mem
PCI: 00:15.0 14 *  [0xe1121000 - 0xe1121fff] mem
PCI: 00:15.1 10 *  [0xe1122000 - 0xe1122fff] mem
PCI: 00:15.1 14 *  [0xe1123000 - 0xe1123fff] mem
PCI: 00:15.2 10 *  [0xe1124000 - 0xe1124fff] mem
PCI: 00:15.2 14 *  [0xe1125000 - 0xe1125fff] mem
PCI: 00:1f.6 10 *  [0xe1126000 - 0xe1126fff] mem
PCI: 00:1d.0 10 *  [0xe1127000 - 0xe11273ff] mem
PCI: 00:16.0 10 *  [0xe1127400 - 0xe112741f] mem
DOMAIN: 0000 mem: next_base: e1127420 size: 11127420 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:e1000000 size:100000 align:20 gran:20 limit:e10fffff
PCI: 01:00.0 10 *  [0xe1000000 - 0xe1001fff] mem
PCI: 00:1c.0 mem: next_base: e1002000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e0ffffff] size 0x01000000 gran 0x18 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001800 - 0x000000183f] size 0x00000040 gran 0x06 io
PCI: 00:03.0 10 <- [0x00e1118000 - 0x00e111bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.0 10 <- [0x00e1100000 - 0x00e110ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:15.0 10 <- [0x00e1120000 - 0x00e1120fff] size 0x00001000 gran 0x0c mem
PCI: 00:15.0 14 <- [0x00e1121000 - 0x00e1121fff] size 0x00001000 gran 0x0c mem
PCI: 00:15.1 10 <- [0x00e1122000 - 0x00e1122fff] size 0x00001000 gran 0x0c mem
PCI: 00:15.1 14 <- [0x00e1123000 - 0x00e1123fff] size 0x00001000 gran 0x0c mem
PCI: 00:15.2 10 <- [0x00e1124000 - 0x00e1124fff] size 0x00001000 gran 0x0c mem
PCI: 00:15.2 14 <- [0x00e1125000 - 0x00e1125fff] size 0x00001000 gran 0x0c mem
PCI: 00:16.0 10 <- [0x00e1127400 - 0x00e112741f] size 0x00000020 gran 0x05 mem64
PCI: 00:1b.0 10 <- [0x00e111c000 - 0x00e111ffff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00e1000000 - 0x00e10fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00e1000000 - 0x00e1001fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1d.0 EHCI Debug Port hook triggered
PCI: 00:1d.0 10 <- [0x00e1127000 - 0x00e11273ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 EHCI Debug Port relocated
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 0c31.0 70 <- [0x000000000a - 0x000000000a] size 0x00000001 gran 0x00 irq <tpm>
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000001860 - 0x0000001867] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001870 - 0x0000001873] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001868 - 0x000000186f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000001874 - 0x0000001877] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e1110000 - 0x00e1117fff] size 0x00008000 gran 0x0f mem
PCI: 00:1f.6 10 <- [0x00e1126000 - 0x00e1126fff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1800 size 78 align 6 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base d0000000 size 11127420 align 28 gran 0 limit efffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48
   PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68
   PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40
   PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420
   PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408
   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
   PCI: 00:00.0 resource base c0000 size 7bf40000 align 0 gran 0 limit 0 flags e0004200 index 1
   PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2
   PCI: 00:00.0 resource base 7c800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3
   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 4
   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 5
   PCI: 00:02.0
   PCI: 00:02.0 resource base e0000000 size 1000000 align 24 gran 24 limit e0ffffff flags 60000201 index 10
   PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 1800 size 40 align 6 gran 6 limit 183f flags 60000100 index 20
   PCI: 00:03.0
   PCI: 00:03.0 resource base e1118000 size 4000 align 14 gran 14 limit e111bfff flags 60000201 index 10
   PCI: 00:13.0
   PCI: 00:14.0
   PCI: 00:14.0 resource base e1100000 size 10000 align 16 gran 16 limit e110ffff flags 60000201 index 10
   PCI: 00:15.0
   PCI: 00:15.0 resource base e1120000 size 1000 align 12 gran 12 limit e1120fff flags 60000200 index 10
   PCI: 00:15.0 resource base e1121000 size 1000 align 12 gran 12 limit e1121fff flags 60000200 index 14
   PCI: 00:15.1
   PCI: 00:15.1 resource base e1122000 size 1000 align 12 gran 12 limit e1122fff flags 60000200 index 10
   PCI: 00:15.1 resource base e1123000 size 1000 align 12 gran 12 limit e1123fff flags 60000200 index 14
   PCI: 00:15.2
   PCI: 00:15.2 resource base e1124000 size 1000 align 12 gran 12 limit e1124fff flags 60000200 index 10
   PCI: 00:15.2 resource base e1125000 size 1000 align 12 gran 12 limit e1125fff flags 60000200 index 14
   PCI: 00:15.3
   PCI: 00:15.4
   PCI: 00:15.5
   PCI: 00:15.6
   PCI: 00:16.0
   PCI: 00:16.0 resource base e1127400 size 20 align 5 gran 5 limit e112741f flags 60000201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:17.0
   PCI: 00:19.0
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base e111c000 size 4000 align 14 gran 14 limit e111ffff flags 60000201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base e1000000 size 100000 align 20 gran 20 limit e10fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base e1000000 size 2000 align 13 gran 13 limit e1001fff flags 60000201 index 10
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base e1127000 size 400 align 10 gran 10 limit e11273ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 0c31.0
   PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
   PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48
   PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40
    PNP: 0c31.0
    PNP: 0c31.0 resource base a size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
    PNP: 0c09.0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 1860 size 8 align 3 gran 3 limit 1867 flags 60000100 index 10
   PCI: 00:1f.2 resource base 1870 size 4 align 2 gran 2 limit 1873 flags 60000100 index 14
   PCI: 00:1f.2 resource base 1868 size 8 align 3 gran 3 limit 186f flags 60000100 index 18
   PCI: 00:1f.2 resource base 1874 size 4 align 2 gran 2 limit 1877 flags 60000100 index 1c
   PCI: 00:1f.2 resource base 1840 size 20 align 5 gran 5 limit 185f flags 60000100 index 20
   PCI: 00:1f.2 resource base e1110000 size 8000 align 15 gran 15 limit e1117fff flags 60000200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base e1126000 size 1000 align 12 gran 12 limit e1126fff flags 60000201 index 10
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 4 run 1655869 exit 5
Enabling resources...
PCI: 00:00.0 subsystem <- 0000/0000
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 0000/0000
PCI: 00:02.0 cmd <- 03
PCI: 00:03.0 subsystem <- 0000/0000
PCI: 00:03.0 cmd <- 02
PCI: 00:14.0 subsystem <- 0000/0000
PCI: 00:14.0 cmd <- 102
PCI: 00:15.0 subsystem <- 0000/0000
PCI: 00:15.0 cmd <- 106
PCI: 00:15.1 subsystem <- 0000/0000
PCI: 00:15.1 cmd <- 102
PCI: 00:15.2 subsystem <- 0000/0000
PCI: 00:15.2 cmd <- 102
PCI: 00:16.0 subsystem <- 0000/0000
PCI: 00:16.0 cmd <- 02
PCI: 00:1b.0 subsystem <- 0000/0000
PCI: 00:1b.0 cmd <- 02
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 0000/0000
PCI: 00:1c.0 cmd <- 06
PCI: 00:1d.0 subsystem <- 0000/0000
PCI: 00:1d.0 cmd <- 02
PCI: 00:1f.0 subsystem <- 0000/0000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 0000/0000
PCI: 00:1f.2 cmd <- 103
PCI: 00:1f.6 subsystem <- 0000/0000
PCI: 00:1f.6 cmd <- 102
PCI: 01:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 5 run 81994 exit 5
Initializing devices...
Root Device init ...
mainboard_ec_init
Chrome EC: Set WAKE mask to 0x00000000
Root Device init finished in 6959 usecs
CPU_CLUSTER: 0 init ...
CPU has 2 cores, 2 threads enabled.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x000000007c800000 size 0x7c740000 type 6
0x000000007c800000 - 0x00000000d0000000 size 0x53800000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
MTRR: default type WB/UC MTRR counts: 7/5.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
MTRR: 1 base 0x000000007c800000 mask 0x0000007fff800000 type 0
MTRR: 2 base 0x000000007d000000 mask 0x0000007fff000000 type 0
MTRR: 3 base 0x000000007e000000 mask 0x0000007ffe000000 type 0
MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Initializing VR config.
PCODE: 24MHz BLCK calibration response: 0
PCODE: 24MHz BLCK calibration value: 0x8506879e
PCH Power: PCODE Levels 0x3f1c50c2 0x004cd2c9
CBFS @ 400000 size 3ff8c0
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 0 size 11440
microcode: sig=0x306d4 pf=0x40 revision=0x1f
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7bf434c1(7bf6d080)
Installing SMM handler to 0x7c000000
Loading module at 7c010000 with entry 7c010070. filesize: 0xf48 memsize: 0x4f68
Processing 35 relocs. Offset value of 0x7c010000
Loading module at 7c008000 with entry 7c008000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x7c008000
SMM Module: placing jmp sequence at 7c007c00 rel16 0x03fd
SMM Module: stub loaded at 7c008000. Will call 7c010070(00000000)
Initializing Southbridge SMI... ... pmbase = 0x1000

SMI_STS: TCO PM1 
PM1_STS: PWRBTN BM TMROF 
In relocation handler: cpu 0
New SMBASE=0x7c000000 IEDBASE=0x7c400000
Writing SMRR. base = 0x7c000006, mask=0xff800800
Relocation complete.
CPU: Intel(R) Celeron(R) 3205U @ 1.50GHz.
Loading module at 00030000 with entry 00030000. filesize: 0x130 memsize: 0x130
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 1 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
AP: slot 1 apic_id 2.
Waiting for 2nd SIPI to complete...done.
In relocation handler: cpu 1
New SMBASE=0x7bfffc00 IEDBASE=0x7c400000
Writing SMRR. base = 0x7c000006, mask=0xff800800
Relocation complete.
Initializing CPU #0
CPU: vendor Intel device 306d4
CPU: family 06, model 3d, stepping 04
Setting up local apic... apic_id: 0x00 done.
cpu: energy policy set to 6
Turbo is available but hidden
Turbo has been enabled
CPU #0 initialized
Initializing CPU #1
CPU: vendor Intel device 306d4
CPU: family 06, model 3d, stepping 04
Setting up local apic... apic_id: 0x02 done.
cpu: energy policy set to 6
CPU #1 initialized
Enabling SMIs.
Locking SMM.
cpu: frequency set to 1500
CPU_CLUSTER: 0 init finished in 323000 usecs
PCI: 00:00.0 init ...
Set BIOS_RESET_CPL
CPU TDP: 15 Watts
PCI: 00:00.0 init finished in 5751 usecs
PCI: 00:02.0 init ...
igd's gtt_res = { base=e0000000, size=1000000, limit=e0ffffff, flags=60000201 }
igd_init: waited for pre-graphics delay to pass
igd_init: went through early init
igd_init: RP1 graphics frequency is set
gtt_read(PCH_PORT_HOTPLUG)


More information about the coreboot mailing list