[coreboot] Lenovo x230 - vgabios

Paul Menzel paulepanter at users.sourceforge.net
Wed May 27 07:55:45 CEST 2015


Dear Michael,


Am Dienstag, den 26.05.2015, 21:12 +0200 schrieb Michael Gerlach:

> This is actually what i have and as i already wrote in another mail i
> got the image via:
> 
> > echo 1 > /sys/devices/pci0000\:00/0000\:00\:02.0/rom
> > cp /sys/devices/pci0000\:00/0000\:00\:02.0/rom vgabios.bin
> 
> On 05/23/15 11:36, Vladimir 'phcoder' Serbinenko wrote:>
> > That's your problem. ROM needs to be extracted, not dumped. You can
> > workaround immediate problem by disabling checksum in SeaBIOS but
> > dumped oprom for intel is not fully functional, i.a. LCD stays black
> > with windows.
> 
> I guess the rom dumped from linux is broken... I still had no time to
> try UEFITool - quite busy atm...

I am curious, how this will differ from the ROM file you extracted
above.

> Attached .config and bootlog

Thank you! Do you have any chance to get the SeaBIOS log too? (Boot
without graphics and get it from CBMEM console with `cbmem -c` over the
network (SSH)?

> and some cmdline-shizzle...
> 
> [21:00:24][n3ph at c3po:~/Stuff/coreboot/x230/coreboot]$ ./build/cbfstool
> build/coreboot.rom print
> coreboot.rom: 12288 kB, bootblocksize 1936, romsize 12582912, offset
> 0xb00000
> alignment: 64 bytes, architecture: x86

Please turn of automatic line wrapping when you paste output when
composing your next message.

> Name                           Offset     Type         Size
> cmos.default                   0xb00000   cmos_default 256
> cmos_layout.bin                0xb00140   cmos_layout  1984
> pci8086,0166.rom               0xb00940   optionrom    65536
> cpu_microcode_blob.bin         0xb10980   microcode    22528
> config                         0xb16200   raw          5457
> revision                       0xb17780   raw          570
> (empty)                        0xb17a00   null         34136
> fallback/romstage              0xb1ff80   stage        73116
> fallback/ramstage              0xb31d80   stage        74814
> fallback/payload               0xb44200   payload      55082
> pci8086,1502.rom               0xb51980   raw          61952
> (empty)                        0xb60bc0   null         521176
> mrc.cache                      0xbdffc0   mrc_cache    65536
> (empty)                        0xbf0000   null         63512
> [21:00:53][n3ph at c3po:~/Stuff/coreboot/x230/coreboot]$ ./build/cbfstool
> build/coreboot.rom extract -n pci8086,0166.rom -f /tmp/vgabios.bin
> Found file pci8086,0166.rom at 0xb00940, type optionrom, size 65536
> W: Only 'raw' files are safe to extract.
> [21:01:17][n3ph at c3po:~/Stuff/coreboot/x230/coreboot]$ file /tmp/vgabios.bin
> /tmp/vgabios.bin: BIOS (ia32) ROM Ext. IBM comp. Video (128*512)
> [21:01:26][n3ph at c3po:~/Stuff/coreboot/x230/coreboot]$ hexdump
> /tmp/vgabios.bin | head
> 0000000 aa55 e980 ea78 3030 3030 3030 3030 3030
> 0000010 3030 2540 59e9 9724 0040 0ab0 3030 4249
> 0000020 204d 4756 2041 6f43 706d 7461 6269 656c
> 0000030 4220 4f49 2e53 0320 006e 007e 008c c08b
> 0000040 4350 5249 8086 0106 001c 001c 0003 0300
> 0000050 0080 0000 8000 0080 0000 0000 0106 0116
> 0000060 0126 0156 0166 0176 0186 0000 036e c000
> 0000070 0000 0000 0000 0000 0000 0000 0088 c000
> 0000080 0000 0000 0000 0000 001a 0337 c000 0000
> 0000090 0000 0000 0000 0000 0000 0000 0000 0000
> [21:01:31][n3ph at c3po:~/Stuff/coreboot/x230/coreboot]$ md5sum
> /tmp/vgabios.bin
> bd4c14c5c2c6cd5fd1bee9428e31b320  /tmp/vgabios.bin
> [21:09:05][n3ph at c3po:~/Stuff/coreboot/x230/coreboot]$ md5sum
> 3rdparty/mainboard/lenovo/x230/vgabios.bin
> bd4c14c5c2c6cd5fd1bee9428e31b320  3rdparty/mainboard/lenovo/x230/vgabios.bin

Thank you for checking that these are indeed the same. From here you
have shown, that the file is not compressed.

Some more comments after looking at your log and config again.

[…]
> PCI: 00:00.0 init 3229 usecs
> PCI: 00:02.0 init
> GT Power Management Init
> IVB GT2 25W-35W Power Meter Weights
> GT Power Management Init (post VBIOS)
> PCI: 00:02.0 init 4503 usecs
> PCI: 00:14.0 init
[…]

That means coreboot is not configured to run the Video BIOS/VGA Option
ROM.

[…]
> # CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT is not set
[…]
> #
> # Devices
> #
> CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
> CONFIG_NATIVE_VGA_INIT_USE_EDID=y
> CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG=y
> # CONFIG_VGA_ROM_RUN is not set
> # CONFIG_ON_DEVICE_ROM_RUN is not set
> # CONFIG_MULTIPLE_VGA_ADAPTERS is not set
[…]

This is the reason for the error message from `acpi.c`.

[…]
> ACPI:    * IGD OpRegion
> GET_VBIOS: 7b46 3714 8b a2 e9
> VBIOS not found.
[…]

As the Video BIOS has not been put into the right place by coreboot
(loading it from CBFS and putting it into memory(?)), it’s of course not
found.

        static void *get_intel_vbios(void)
        {
        	/* This should probably be looking at CBFS or we should always
        	 * deploy the VBIOS on Intel systems, even if we don't run it
        	 * in coreboot (e.g. SeaBIOS only scenarios).
        	 */
        	u8 *vbios = (u8 *)0xc0000;

        	optionrom_header_t *oprom = (optionrom_header_t *)vbios;
        	optionrom_pcir_t *pcir = (optionrom_pcir_t *)(vbios +
        						oprom->pcir_offset);
        

        	printk(BIOS_DEBUG, "GET_VBIOS: %x %x %x %x %x\n",
        		oprom->signature, pcir->vendor, pcir->classcode[0],
        		pcir->classcode[1], pcir->classcode[2]);


        	if ((oprom->signature == OPROM_SIGNATURE) &&
        		(pcir->vendor == PCI_VENDOR_ID_INTEL) &&
        		(pcir->classcode[0] == 0x00) &&
        		(pcir->classcode[1] == 0x00) &&
        		(pcir->classcode[2] == 0x03))
        		return (void *)vbios;

        	return NULL;
        }

You’ll need something like the following for your device.

        config ALWAYS_LOAD_OPROM
        	def_bool n
        	depends on VGA_ROM_RUN
        	help
        	  Always load option ROMs if any are found. The decision to run
        	  the ROM is still determined at runtime, but the distinction
        	  between loading and not running comes into play for CHROMEOS.

        	  An example where this is required is that VBT (Video BIOS Tables)
        	  are needed for the kernel's display driver to know how a piece of
        	  hardware is configured to be used.

(I have no idea how it’s determined at run time though, when to run the
ROM and when not.)

Also, the SeaBIOS logs are still needed to look into this further to see
why SeaBIOS does not execute the VGA Option ROM.

So maybe try first to let coreboot run the VGA Option ROM itself by
selecting `VGA_ROM_RUN`.

Additionally, please post a log with native graphics initialization
enabled. No idea, what USB debug dongle you use, but if you use the GRUB
payload it should be able to deal with the coreboot framebuffer and
maybe even output something over the USB debug connection.


Thanks,

Paul
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 181 bytes
Desc: This is a digitally signed message part
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20150527/648fed9f/attachment.asc>


More information about the coreboot mailing list