[coreboot] (no subject)

[Nick]

Hi,

I'm looking for a little advice (or steering in the right direction) in
regards to IOAPICs and how Coreboot manages detection. I have two MCP-55
chipsets just like the nVidia l1_2pvv board.

When I boot Linux under the *vendor bios* with apic debugging enabled, I
can see that I have two IOAPICs-

[    0.000000] IOAPIC[0]: apic_id 4, version 17, address 0xfec00000, GSI
0-23
[    0.000000] IOAPIC[1]: apic_id 5, version 17, address 0xb0400000, GSI
24-47

And, when I boot using Coreboot*,* I have only one-

[    0.000000] IOAPIC[0]: apic_id 5, version 17, address 0xf4340000, GSI
0-23

Now, I'm sure this output is coming from the MP Table which Linux is
reading back.

In mptable.c a lot of the MCP-55 boards share this detection code for
building the MP Table. Mine will only enter the if statement for bus_mcp55b.

get_bus_conf();
sbdn = sysconf.sbdn;
m = sysconf.mb;


dev = dev_find_slot(m->bus_mcp55, PCI_DEVFN(sbdn+ 0x1,0));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res)
smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);


if (m->bus_mcp55b) {
dev = dev_find_slot(m->bus_mcp55b, PCI_DEVFN(m->sbdnb + 0x1,0));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res)
smp_write_ioapic(mc, m->apicid_mcp55b, 0x11, res->base);

So, my question is - what is responsible for detecting the IOAPICs? Is
there some configuration somewhere which I may be missing? Any tips for
where to look?

Here's a full output from Coreboot and the Linux kernel(apic=debug
show_lapic=all): *http://pastebin.com/PMVtt6hU
<http://pastebin.com/PMVtt6hU>*

Here's Linux kernel output from the vendor bios:* http://pastebin.com/VscyMxM2
<http://pastebin.com/VscyMxM2>* (MPTable @ line 110.)

Thanks in advance!

-Nick
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