[coreboot] AGESA PI for Olivehill+

[Kyösti Mälkki]

On to, 2015-05-07 at 13:19 +0000, Wolfgang Kamp - datakamp wrote:
> Hi Bruce,
> 
> is it right that the AGESA Pi binary for AMD Olivehill+ board is not usable for custom board implementations of FT3B GSOC?
> For example, if we use memory down design in star topology, AGESA will fail to initialize DDR3.
> 
> Regards,
> Wolfgang
> 

I assume you have left out SPD eeproms from BOM, so have you already
created and double-checked the SPD files? We have some boards in the
tree doing that already.

I hope to upstream DB-FT3b-LC board sources to coreboot.org, possibly
next week. That may or may not help You further.

Do you have PI build with raminit logging enabled?


Regards,
Kyösti