[coreboot] VGA doesn't work on Mohon Peak
Kuzmichev Viktor
kuzmichevviktorv at gmail.com
Thu Mar 19 11:22:27 CET 2015
Hello,
I'm using coreboot + SeaBIOS on Mohon Peak CRB. And I've tried to make
VGA work for a while now. I used this article as a guide:
http://www.coreboot.org/VGA_support
Extracting VGA BIOS from vendor BIOS image did not work:
$ ./bios_extract EDVLCRB1.86B.0043.R00.1408290947_MPK.bin
Using file "EDVLCRB1.86B.0043.R00.1408290947_MPK.bin" (8192kB)
Error: Unable to detect BIOS Image type.
Then, I've downloaded VGA BIOS from here:
http://www.aspeedtech.com/support.php
Mohon Peak uses Aspeed VGA controller AST1300.
And also, I've extracted Video ROM from /dev/mem:
# dd if=/dev/mem of=vgabios.bin bs=1k count=32 skip=768
Neither of them worked. Here's what I've tried. I've tried to add them
via coreboot's menuconfig (' Add VGA BIOS image' option). I've tried to
add them manually via cbfstool as an optionrom and as a raw file. I've
tried to put them in CBFS under vgaroms/ directory. Here's my latest
ROM-file layout:
$ ./build/cbfstool build/coreboot.rom print
coreboot.rom: 8192 kB, bootblocksize 1024, romsize 8388608, offset 0x600000
alignment: 64 bytes, architecture: x86
Name Offset Type Size
cmos_layout.bin 0x600000 cmos_layout 1352
pci1a03,2000.rom 0x600580 optionrom 32768
fallback/romstage 0x6085c0 stage 26616
fallback/ramstage 0x60ee00 stage 59904
fallback/payload 0x61d840 payload 56100
config 0x62b3c0 raw 4532
revision 0x62c5c0 raw 708
pci8086,1f41.rom 0x62c8c0 raw 61952
vgaroms/pci1a03,2000.rom 0x63bb00 raw 32768
img/Memtest86+(5.01) 0x643b40 payload 159492
(empty) 0x66aa80 null 939288
mrc.cache 0x74ffc0 (unknown) 65536
cpu_microcode_blob.bin 0x760000 microcode 83968
(empty) 0x774840 null 46936
fsp.bin 0x77ffc0 (unknown) 372736
(empty) 0x7db000 null 150424
The entries pci1a03,2000.rom are the VGA ROMs there. I also tried to
remove either of them. I've tested with coreboot option 'Run VGA Option
ROMs' checked and unchecked without any difference. In SeaBIOS I set
'VGA Hardware Type (coreboot linear framebuffer)' as the other options
are None, GeodeGX2 and GeodeLX, so coreboot linear framebuffer seemed
more logical.
I saw this mailing list:
http://www.seabios.org/pipermail/seabios/2015-January/008588.html
but found no solution there and it seems not to be my case as my board
does not hang.
I put coreboot and SeaBIOS output in the attachment. Debug levels set to
7 for both. In coreboot only 'Output verbose CBFS debug messages'
checked in 'Debugging' submenu.
Is there anything I'm doing wrong or simply missing?
Viktor
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