[coreboot] questions about google/samus

Stefan Reinauer stefan.reinauer at coreboot.org
Fri Mar 13 01:59:21 CET 2015

Hi Anthony,

* Anthony Martin <ality at pbrane.org> [150312 23:27]:
> - Does it use the usual depthcharge payload with an internal
>   write-protect switch for flashing the firmware? There's no
>   boot guard shenanigans going on, correct?

That is correct. Like all Chrome OS devices, Samus (Pixel2) uses
the SPI flash's hardware write protect mechanism for a portion of the
firmware (AKA RO firmware, root of trust).

There are currently no plans to use boot guard in Chrome OS devices, as
it does not provide the same level of protection as the existing
security mechanism, but has a larger impact on using Chrome OS machines
as "hackable devices".

> - It looks like the gigabit ethernet device is disabled in the
>   device tree but are there pins or pads on the board to get
>   to it?

There are no pads for GBit ethernet. As with most mobile devices, board
space is too rare to leave unused things on there (even if you were
willing to destroy the case to break it out)

> - Can someone describe the keyboard in comparison to, say, an
>   older Macbook Pro, a Thinkpad X230 or X240, and the Toshiba
>   Chromebook 2? What is the key travel distance like?

I'm not a keyboard expert, but I prefer the keyboard over my old MacBook
> - Is the display panel IPS or TN?
12.85-inch high resolution IPS (2560 x 1700, at 239 PPI) 400 nit, 3:2
aspect ratio

> - Is the SSD soldered to the board?

> - Could this be the coreboot laptop we've all been waiting for? :)

I am biased on that topic, but it is the nicest coreboot laptop I have
worked on, so far. Two USB Type C ports, open source EC and USB PD MCU
firmware, and 12h battery life are my personal favorites.


More information about the coreboot mailing list