[coreboot] [Mohon Peak] Console output on external UARTs behind PCIe

Patrick Agrain patrick.agrain at alcatel-lucent.com
Fri Mar 6 17:25:55 CET 2015

Hello everybody,

Do you think that it would be possible to output the console messages 
from coreboot (seabios) on another UART port (strapped to be visible on 
Memory-based space or IO Space) connected on a PCIe slot ?

I've purchased a StarTech UART board with an OXPCIe952 chip, with the 
same IDs as visible in ./src/drivers/uart/oxpcie.c.

what is behind the sentence:
"In order to use the card for romstage debugging, minimal setup of the 
PCIe bridge and the MPEX2S952 have to be added to romstage.c" ?

Thanks in advance.
Best regards,
Patrick Agrain

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