[coreboot] FSPInitiNot Returning

David Crammer dcrammer at gmail.com
Wed Dec 9 20:05:21 CET 2015


Yes. This is a broadwell platform.  I removed the UPD settings and left
them default (passed NULL for that pointer in the parameters to FspInit).
It seems to get past that point now.  I did notice that the SMBus addresses
for the DIMMs were being set to different values than what is listed in the
binary configuration tool.  This and the PMBASE settings were really the
only things changed in the coreboot source.  Maybe this is the cause?

I don't really have any logs as I'm only debugging with port 0x80 values.

On Wed, Dec 9, 2015 at 11:19 AM, Jin, Huang <huang.jin at intel.com> wrote:

> Hi David,
>
>
>
> I am assuming you are using a Broadwell platform and Broadwell FSP. Could
> you please share some logs? I might be able to help you.
>
>
>
> Thanks,
>
> Huang
>
>
>
> *From:* coreboot [mailto:coreboot-bounces at coreboot.org] *On Behalf Of *David
> Crammer
> *Sent:* Wednesday, December 09, 2015 8:19 AM
> *To:* coreboot at coreboot.org
> *Subject:* [coreboot] FSPInitiNot Returning
>
>
>
> Hello All,
>
>     I’m running into a rather strange error and I’m hoping someone has had
> experience with this or may know about what I’m seeing.
>
>
>
> I’m working with an Intel I5 5350U on an ADLINK platform.  I’m getting to
> the part of the boot sequence where FspInit is called but it never returns
> to the specified return function.  The system resets 3 times with a post
> code (codes inserted before and in return function) indicating that it got
> to the FspInit call and reset.  After the third time, it settles on a post
> code of 0xBE.  I can’t find reference to the post code anywhere.
>
>
>
> Any help would be greatly appreciated.  In case anyone is interested, I’ll
> reply with any updates.
>
>
>
> --David Crammer
>
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