[coreboot] coreboot ported to the ASUS KGPE-D16 (Libreboot: blobless, fully functional!)

[Timothy Pearson]

All,

I have successfully ported coreboot to the relatively modern ASUS 
KGPE-D16 server board (dual AMD socket G34, 16 DDR3 DIMMs, 
https://www.asus.com/us/Commercial_Servers_Workstations/KGPED16/)!  This 
port uses native Family 10h initialization (_not_ AGESA or CIMX).

The Libreboot folks will be interested to know that this board can run 
blob-free and still retain full functionality!

Port specifications:
CPU: Dual AMD G34 Magny-Cours (Family 10h)
RAM: 16 DDR3 DIMM slots with ECC support (tested with x4 4G DDR3-1333 
unbuffered DIMMs)

Peripherals:
PCIe slots: all functional
PCI slot: functional
RS-232: functional
PS/2: expected to function, not tested (on SuperIO)
ASpeed VGA device: functional (text mode, see below)
IEEE1394: functional
On-board USB: functional
On-board NICs: functional
ASUS PIKE SAS controller: functional
PCIe ROMs: functional

Power management:
DDR3 voltage set: functional
ACPI/APIC: functional
Suspend/resume: broken

Other:
cbmem console: partial support (log truncated)
cbmem timestamps: functional
nvram: functional
BIOS recovery jumper: functional

ASpeed VGA:
The ASpeed VGA device initialises in text mode via its (new) coreboot 
driver, however this initialisation is incomplete, leading to distorted 
but quite usable VGA output.  When Linux boots and engages the graphical 
framebuffer all distortion disappears.

This port was not trivial.  Almost every device used was broken and 
required debugging/repair, with the notable exception of the SuperIO 
chip.  The AMD DDR3 controller was severely broken to the point where 
large rewrites were needed in order to bring it in line with the BKDG. 
Even after the various component drivers were repaired

Due to the labor-intensive nature of the port and the extensive changes 
throughout the entire source tree, it is not economically feasible to 
merge this port upstream at this time (I estimate upward of 30 
independent patches would be required just to get the board booting!). 
Raptor Engineering will, however, be continuing to maintain this port 
internally, and I am currently looking into adding native Family 15h 
support on top of this internal tree.  Additionally, while it was not a 
priority for the initial port, I will be attempting to enable 
suspend/resume functionality as I have time.

If there is sufficient interest from the community in adding this board 
to coreboot I would consider merging the changes in exchange for a 
one-time contract payment in the vicinity of $35,000 USD.  When 
considering this offer please bear in mind that this is a fully 
functional blobless board with a wide range of peripherals and expansion 
options available, and that once these large changes are merged I will 
continue to enhance coreboot functionality as before (e.g. with the 
KFSN4-DRE and the T400).  I would also be willing to add this board to 
the test stand as the only fully supported 4-way Opteron board (socket 
G34 Magny-Cours CPUs contain two separate CPUs in one package, making 
this 2-socket board a 4-way system from a HyperTransport perspective).

Please let me know if you have any questions!

-- 
Timothy Pearson
Raptor Engineering
+1 (415) 727-8645
http://www.raptorengineeringinc.com