[coreboot] Google Panther: coreboot has to wait for Intel’s ME (Management Engine)

Paul Menzel paulepanter at users.sourceforge.net
Sun Apr 26 10:03:23 CEST 2015


Dear coreboot folks,


looking at the time stamps of the Intel Haswell device Google Panther,
which Matt DeVillier thankfully uploaded to the board status repository
[1], it looks odd that it took around a quarter of a second, from after
the SeaBIOS payload was decompressed to starting the payload. This is
almost half of the whole boot time.

        […]
          90:load payload                                      233,302 (216)
          15:starting LZMA decompress (ignore for x86)         233,415 (113)
          16:finished LZMA decompress (ignore for x86)         250,327 (16,912)
          99:selfboot jump                                     493,712 (243,384)

Thanks to Aaron Durbin’s analysis of the code path, the finalize in line
138 of `src/southbridge/intel/lynxpoint/smi.c` calls
`intel_me_mbp_clear()` in line 589 of
`src/southbridge/intel/lynxpoint/me_9.x.c`.

        $ more src/southbridge/intel/lynxpoint/me_9.x.c # line 589
        […]
        #if CONFIG_ME_MBP_CLEAR_LATE
        	/* Wait for ME MBP Cleared indicator */
        	intel_me_mbp_clear(PCH_ME_DEV);
        #endif
        […]

The issue is even described in the Kconfig option description of
`ME_MBP_CLEAR_LATE` and the commit message of commit 3d299c4b (lynxpoint
me: add support for mbp clear wait in finalize step) [2] adding this
option.

        $ more src/southbridge/intel/lynxpoint/Kconfig
        […]
        config ME_MBP_CLEAR_LATE
        	bool "Defer wait for ME MBP Cleared"
        	default y
        	help
        	  If you set this option to y, the Management Engine driver
        	  will defer waiting for the MBP Cleared indicator until the
        	  finalize step.  This can speed up boot time if the ME takes
        	  a long time to indicate this status.
        […]

I guess there is no way to get fixed ME BLOBs from Intel. I heard the ME
BLOB has been fixed for newer Intel devices.


Thanks,

Paul


[1] http://review.coreboot.org/gitweb?p=board-status.git;a=commitdiff;h=3926f95b143b74c0762516df0bdf250c1dd8ba32#patch4
[2] http://review.coreboot.org/4375
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 181 bytes
Desc: This is a digitally signed message part
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20150426/6cbdebd1/attachment-0001.asc>


More information about the coreboot mailing list