[coreboot] fsp_baytrail default SMM_TSEG_SIZE value

Aaron Durbin adurbin at chromium.org
Mon Apr 20 16:18:39 CEST 2015


On Sat, Apr 18, 2015 at 7:13 AM, David Imhoff <dimhoff_devel at xs4all.nl> wrote:
> On 2015-04-16 16:31, Aaron Durbin wrote:
>>
>> On Wed, Apr 15, 2015 at 5:06 AM, David Imhoff <dimhoff_devel at xs4all.nl>
>> wrote:
>>>
>>> When I change the SMM_TSEG_SIZE value to 0x800000 my Minnowboard Max is
>>> able to boot.
>>>
>>> So I wonder what the reason is for setting SMM_TSEG_SIZE to 0x100000
>>> for fsp_baytrail SOC's instead of 0x800000 or 0? Also why is there a
>>> difference between the smm_region_size() default and the Kconfig
>>> default?
>>>
>>
>> See my comments on http://review.coreboot.org/#/c/7026/6
>>
>> This patch should make it work for you as you noted.
>>
>> diff --git a/src/soc/intel/fsp_baytrail/Kconfig
>> b/src/soc/intel/fsp_baytrail/Kconfig
>> index d97879f..4881d8d 100644
>> --- a/src/soc/intel/fsp_baytrail/Kconfig
>> +++ b/src/soc/intel/fsp_baytrail/Kconfig
>> @@ -72,7 +72,7 @@ config CPU_ADDR_BITS
>>
>>  config SMM_TSEG_SIZE
>>         hex
>> -       default 0x100000
>> +       default 0x800000
>>         help
>>           This is set by the FSP
>>
>
> I tested you're patch and can confirm it works. Can I do anything to get
> this
> patch accepted into GIT?

Feel free to send it up for review. If you are unable, I'll need to do
it, but I've got a stack of things ahead of this task.


>
> I also quickly looked into you're review comment about BAYTRAIL_SMM. It is
> only
> used in src/soc/intel/fsp_baytrail/acpi.c. The only thing I can say about
> this
> is that if I force this ifdef to true and add 'cpu/x86/smm.h' to the
> includes,
> I can still build a booting firmware and boot Linux. But since I don't know
> what this code does, I can't say if this is the correct solution.
>
> Kind regards,
>
> David



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