[coreboot] sourcing 128MB flash chips for an X60 with coreboot

[Carl-Daniel Hailfinger]

Hi,

On 29.10.2014 05:17, Charles Devereaux via coreboot wrote:
> On Tue, Oct 28, 2014 at 8:56 PM, Kyösti Mälkki <kyosti.malkki at gmail.com>
> wrote:
>
>> For the i82801gx part in x60, I am not sure if it will support 16MB SPI
>> parts as datasheet specifies decode registers for the top 8MB only.
>>
>> Or was there already a proof-of-concept it works?
>>
>> FWH_DEC_EN1—Firmware Hub Decode Enable Register.
> Oops. you may be right. I just picked up 16 MB since it was the largest
> size SPI would support. For the moment, I guess I will have to restrict the
> images to 8MB

What does FWH_DEC_EN1 have to to with SPI flash? AFAICS it's for FWH
flash, a totally different beast.
Or put another way, why would that register restrict SPI flash size in
any way?

Regards,
Carl-Daniel