[coreboot] WOL/PCI PME wakeup from S3 Baytrail SoC (Bayleybay CRB)

[Gailu Singh]

Also there are 0 acpi interrupts in /proc/acpi/interrupts

#cat /proc/interrupts | grep -i acpi
  9:          0          0   IO-APIC-fasteoi   acpi

On Fri, Nov 28, 2014 at 11:13 PM, Gailu Singh <gailu96 at gmail.com> wrote:

> When tracing the problem I found that there is no GPE events getting
> triggered even though they are enabled. All the gpe interrupt counters are
> zero in /sys/firmware/acpi/interrupts. GPE0a_EN register has desired bits
> enabled. Any idea what could be the reason for not getting GPE events?
>
> On Fri, Nov 28, 2014 at 3:52 PM, WANG FEI <wangfei.jimei at gmail.com> wrote:
>
>> Guilu,
>>
>> About the item 2, please refer to
>> https://www.pcisig.com/specifications/conventional/pcipm1.2.pdf, chapter
>> 3, my experience is based on this spec. I bet PCIE devices should be
>> compatible with this doc.
>>
>> This doc will focus on PCI/PCIE devices behind PCI/PCIE bridges/root
>> ports, it's described how to configure the PCI/PCIE devices to wake
>> themselves from PME signals. This job suppose to be done before system
>> sleep(S1/S3/S4/S5).
>>
>> -Fei
>>
>> On Fri, Nov 28, 2014 at 6:42 AM, Gailu Singh <gailu96 at gmail.com> wrote:
>>
>>> Hi Wang Fei,
>>>
>>> Thank you very much for your help. I checked the things you suggested
>>> but still it does not work. Here are some details.
>>>
>>> >>1) SoC ACPI registers: Enable PCIE PME in PM and GPE registers.
>>>             You are right  PCIE Wake was disabled in smm.c I enabled it
>>>                 - enable_pm1(PWRBTN_EN | GBL_EN | PCIEXPWAK_DIS);
>>>                 + enable_pm1(PWRBTN_EN | GBL_EN);
>>>              I Enabled GPE registers as well
>>>                 + enable_gpe(PCI_EXP_EN | PCIE_WAKE1_EN | PCIE_WAKE2_EN
>>> | SUS_GPIO_EN1 | SUS_GPIO_EN2);
>>>
>>> >>3) Report WOL PME single in ASL _GPE{} with _Lxx method
>>>              I have _Lxx methods in GPE as below
>>>                 Method(_L11) {
>>>                     Notify(PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
>>>                 }
>>>
>>> >> 4) (Option) If WOL PME single connect a GPIO, you have to configure
>>> GPIO pin as well.
>>>              I tried configuring GPIO in gpio.c as GPIO_ACPI_WAKE and
>>> GPIO_ACPI_SCI
>>>              - GPIO_DEFAULT,           /* GPIO_S5[01] */
>>>              - GPIO_DEFAULT,           /* GPIO_S5[02] */
>>>              + GPIO_ACPI_WAKE,     /* GPIO_S5[01] */
>>>              + GPIO_ACPI_WAKE,     /* GPIO_S5[02] */
>>>
>>> >>2) PCIE Card ACPI register: Yeah, you need set some registers of the
>>> PCIE card to allow it waked by packages.
>>>         I am not clear about this. Can you please elaborate little more
>>> on this. Do I need it to wake SoC or is it required for SoC to wake PCIe
>>> card after resume? From power button resume card works fine post resume.
>>>
>>> Am I doing something wrong in the first three things you suggested?
>>>
>>> Best Regards
>>>
>>> On Wed, Nov 26, 2014 at 8:33 PM, WANG FEI <wangfei.jimei at gmail.com>
>>> wrote:
>>>
>>>> I remember WOL PME wakeup function need configure 3-4 different areas,
>>>>
>>>> 1) SoC ACPI registers: Enable PCIE PME in PM and GPE registers.
>>>>
>>>> 2) PCIE Card ACPI register: Yeah, you need set some registers of the
>>>> PCIE card to allow it waked by packages.
>>>>
>>>> 3) Report WOL PME single in ASL _GPE{} with _Lxx method
>>>>
>>>> 4) (Option) If WOL PME single connect a GPIO, you have to configure
>>>> GPIO pin as well.
>>>>
>>>> Please check your code and see if anything missed.
>>>>
>>>> On Tue, Nov 25, 2014 at 2:27 PM, Gailu Singh <gailu96 at gmail.com> wrote:
>>>>
>>>>> Hi Sean,
>>>>>
>>>>> Thanks for your help and showing me the direction. You are right GPIO
>>>>> pins for PMC_WAKE_PCIE were set to GPIO_DEFAULT in
>>>>> src/mainboard/intel/bayleybay_fsp/gpio.c. I have changed that to
>>>>> GPIO_ACPI_WAKE now. This seems to be one step closer to the solution but
>>>>> looks like something still missing as wakeup from PCIE device is still not
>>>>> working with coreboot. Any other thing that I should look at?
>>>>>
>>>>> Best Regards
>>>>>
>>>>> >>Perhaps you do not have all your GPIO pins set properly.
>>>>>
>>>>> On Mon, Nov 24, 2014 at 5:04 PM, Gailu Singh <gailu96 at gmail.com>
>>>>> wrote:
>>>>>
>>>>>> Hi Experts,
>>>>>>
>>>>>> I have PCIe card that supports wake on lan and it works fine with
>>>>>> BIOS. On sending magic packet System wakes up from S3.
>>>>>>
>>>>>> However If I use same Linux image with coreboot wake from PCI device
>>>>>> does not wake the system. System wakes up from S3 using power button only.
>>>>>>
>>>>>> I suspected the problem with dsdt and took dsdt binary from bios
>>>>>> setup, disassembled it and replaced dsdt.asl in coreboot with the one from
>>>>>> bios to match dsdt configuration. Now my dsdt and linux image are same but
>>>>>> still system does not wake from PCI PME (WOL) in coreboot but works fine
>>>>>> with bios.
>>>>>>
>>>>>> In both cases wakeup is enabled in
>>>>>> /sys/bus/pci/devices/0000\:01\:00.0/power/wakeup
>>>>>>
>>>>>> Can you please advise what else could be the problem?
>>>>>>
>>>>>> PME signal is connected to GPIOS5 on the SoC.
>>>>>>
>>>>>> Best Regards
>>>>>>
>>>>>>
>>>>>
>>>>> --
>>>>> coreboot mailing list: coreboot at coreboot.org
>>>>> http://www.coreboot.org/mailman/listinfo/coreboot
>>>>>
>>>>
>>>>
>>>
>>
>
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