[coreboot] I've turned on paging as a test

Aaron Durbin adurbin at google.com
Tue Mar 11 01:36:11 CET 2014

On Mon, Mar 10, 2014 at 5:32 PM, ron minnich <rminnich at gmail.com> wrote:
> I'm *pretty* *sure* that you can use the PATs as an alternative to MTRRs. I
> am going to dig a bit. It would sure make our life easier if we could live
> without all this MTRR fuss. We keep having to tweak the code and it's never
> been fun.
> And I like the idea of write-protecting coreboot code.

In Intel manuals, there's a table named "Effective Page-Level Memory
Types for Pentium III and More Recent Processor Families." There's a
table that lists the combination of PAT and MTRR. It's not a an
alternative. It describes how those settings interact.

Anyway, depending on what exactly you want to solve there may be other
solutions to your problem.


More information about the coreboot mailing list