[coreboot] coreboot Digest, Vol 109, Issue 2

Muhammad Ramshad ramshadsosmail at gmail.com
Sun Mar 2 09:00:52 CET 2014


Hi,

I am Muhammad Ramshad currently pursuing my degree program in University of
Moratuwa in the field of Electronic and Telecommunication Engineering.
I am always interested learning new technologies and knowledge, so i found
that GSoC is really a good platform for me to learn new things.

When i search through the projects and organizations the coreboot project
grabbed my focus towards it because i am more interested in Digital System
Design and hardware a level development like processor design and ISA
designs.

at the moment i m not much familiar with coreboot, but i always more
committed towards work and a fast learner, these days i spent my time to
become familiar with coreboot.

I am interested in writing a proposal for "coreboot mainboard test suite

So i expect your  guidance to make this success and hope to contribute even
if my proposal will not selected for GSoC

Thanks

regards

Ramshad


On Sun, Mar 2, 2014 at 2:23 AM, <coreboot-request at coreboot.org> wrote:

> Send coreboot mailing list submissions to
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>
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> or, via email, send a message with subject or body 'help' to
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> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of coreboot digest..."
>
>
> Today's Topics:
>
>    1. Re: Unable to start correctly coreboot on Asus f2a85-m    REV
>       1.02 (HacKurx)
>    2. F2A85-M coreboot not working (Rostislav Lisovy)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Sat, 1 Mar 2014 12:49:43 +0100
> From: HacKurx <hackurx at gmail.com>
> To: Scott Duplichan <scott at notabs.org>
> Cc: David Hubbard <david.c.hubbard+coreboot at gmail.com>, Peter Stuge
>         <peter at stuge.se>, Coreboot <coreboot at coreboot.org>
> Subject: Re: [coreboot] Unable to start correctly coreboot on Asus
>         f2a85-m REV 1.02
> Message-ID:
>         <CAFwXZv_1D2YomGTWNEwSVwgt5bJC+vbFdK=
> wDs_wFJJSbdcCkg at mail.gmail.com>
> Content-Type: text/plain; charset=UTF-8
>
> > Scott wrote:
> > diff --git
> a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c
> >
> b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c
> > index 8157b57..bfcaa9a 100644
> > ---
> a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c
> > +++
> b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c
> > @@ -86,6 +86,12 @@ STATIC CONST CPU_LOGICAL_ID_XLAT ROMDATA
> CpuF15TnLogicalIdAndRevArray[] =
> >      0x6101,
> >      AMD_F15_TN_A1
> >    },
> > +
> > +  { // HACK: let Richland run Trinity agesa code
> > +    0x6131,
> > +    AMD_F15_TN_A1
> > +  },
> > +
> >    {
> >      0x6100,
> >      0x0000000000000100ull
>
> Perfect! It works, thank you very much!
>
> Coreboot log:
> http://pastebin.com/B0Z1bTQu
>
> Diff (I used CROSSGCC 1.23 because CROSSGCC 1.24 can not be compil on
> my system - Debian Wheezy amd64) :
> http://pastebin.com/nbt0JmqN
>
> My config file :
> http://pastebin.com/zJLQPkgX
>
> My CPU seems a little slower but it works :)
> It remains only to integrate this into the wiki and coreboot, I know
> that I can count on you ;)
>
> >From my side I will continue my tests. Thank you everybody, best regards.
>
>
>
> ------------------------------
>
> Message: 2
> Date: Sat, 01 Mar 2014 21:52:04 +0100
> From: Rostislav Lisovy <lisovy at gmail.com>
> To: coreboot at coreboot.org
> Subject: [coreboot] F2A85-M coreboot not working
> Message-ID: <1393707124.13881.6.camel at lolumad>
> Content-Type: text/plain; charset="utf-8"
>
> Hello;
> I am trying to run coreboot on F2A85-M motherboard (without VGA support
> enabled). The CPU used is AMD Trinity A8-5600K, RAM is Kingston HyperX
> PnP 4GB (2x2GB) DDR3 1866
> (http://www.kingston.com/datasheets/KHX1866C11D3P1K2_4G.pdf).
>
> I cloned the coreboot repository and ran 'make menuconfig'. The only
> options I set were motherboard vendor and type (RAM voltage is the
> default value of 1.5V). The desired payload is the default SeaBIOS. I
> have no interest in enabling VGA, thus I did not try to enable it.
> I used flashrom to flash the image. When I try to boot, execution fails
> with the following message (full log in the attachment):
>
>   Enabling resources...
>
>   Fam15 - domain_enable_resources: AmdInitMid.
>   agesawrapper_amdinitmid Unexpected Exception: 0 @ 10:0022fabf - Halting
>   Code: 0 eflags: 00010046
>   eax: 0002e630 ebx: 0000014d ecx: 00000002 edx: 00000000
>   edi: 100123e3 esi: 00000000 ebp: 10000660 esp: 002bcd60
>
> The number on my PCI POST card is "0x1".
>
> Unfortunately I have no other RAM modules to try. I tried to change the
> position from blue slots to black slots but then I got:
>
>   coreboot-4.0-5584-ge92155f-dirty Sat Mar  1 21:05:40 CET 2014 starting...
>   BSP Family_Model: 00610f01
>   cpu_init_detectedx = 00000000
>   agesawrapper_amdinitreset Fch OEM config in INIT RESET Done
>   Got past agesawrapper_amdinitearly
>   ASSERTION FAILED: file
> 'src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmExcludeDimm.c',  line 236
>
> The command 'make crossgcc' also seems not to help at all.
>
> I will appreciate any ideas.
>
> Regards;
> Rostislav Lisovy
>
> -------------- next part --------------
> #
> # Automatically generated make config: don't edit
> # coreboot version: 4.0-5584-ge92155f-dirty
> # Sat Mar  1 21:05:27 2014
> #
>
> #
> # General setup
> #
> CONFIG_EXPERT=y
> CONFIG_LOCALVERSION=""
> CONFIG_CBFS_PREFIX="fallback"
> CONFIG_COMPILER_GCC=y
> # CONFIG_COMPILER_LLVM_CLANG is not set
> # CONFIG_SCANBUILD_ENABLE is not set
> # CONFIG_CCACHE is not set
> # CONFIG_SCONFIG_GENPARSER is not set
> # CONFIG_USE_OPTION_TABLE is not set
> CONFIG_COMPRESS_RAMSTAGE=y
> CONFIG_INCLUDE_CONFIG_FILE=y
> # CONFIG_EARLY_CBMEM_INIT is not set
> # CONFIG_DYNAMIC_CBMEM is not set
> # CONFIG_COLLECT_TIMESTAMPS is not set
> CONFIG_USE_BLOBS=y
> # CONFIG_COVERAGE is not set
>
> #
> # Mainboard
> #
> # CONFIG_VENDOR_AAEON is not set
> # CONFIG_VENDOR_ABIT is not set
> # CONFIG_VENDOR_ADLINK is not set
> # CONFIG_VENDOR_ADVANSUS is not set
> # CONFIG_VENDOR_ADVANTECH is not set
> # CONFIG_VENDOR_AMD is not set
> # CONFIG_VENDOR_AOPEN is not set
> # CONFIG_VENDOR_ARIMA is not set
> # CONFIG_VENDOR_ARTECGROUP is not set
> # CONFIG_VENDOR_ASI is not set
> # CONFIG_VENDOR_ASROCK is not set
> CONFIG_VENDOR_ASUS=y
> # CONFIG_VENDOR_A_TREND is not set
> # CONFIG_VENDOR_AVALUE is not set
> # CONFIG_VENDOR_AXUS is not set
> # CONFIG_VENDOR_AZZA is not set
> # CONFIG_VENDOR_BACHMANN is not set
> # CONFIG_VENDOR_BCOM is not set
> # CONFIG_VENDOR_BIFFEROS is not set
> # CONFIG_VENDOR_BIOSTAR is not set
> # CONFIG_VENDOR_BROADCOM is not set
> # CONFIG_VENDOR_COMPAQ is not set
> # CONFIG_VENDOR_CUBIETECH is not set
> # CONFIG_VENDOR_DIGITALLOGIC is not set
> # CONFIG_VENDOR_DMP is not set
> # CONFIG_VENDOR_EAGLELION is not set
> # CONFIG_VENDOR_ECS is not set
> # CONFIG_VENDOR_EMULATION is not set
> # CONFIG_VENDOR_GETAC is not set
> # CONFIG_VENDOR_GIGABYTE is not set
> # CONFIG_VENDOR_GIZMOSPHERE is not set
> # CONFIG_VENDOR_GOOGLE is not set
> # CONFIG_VENDOR_HP is not set
> # CONFIG_VENDOR_IBASE is not set
> # CONFIG_VENDOR_IBM is not set
> # CONFIG_VENDOR_IEI is not set
> # CONFIG_VENDOR_INTEL is not set
> # CONFIG_VENDOR_IWAVE is not set
> # CONFIG_VENDOR_IWILL is not set
> # CONFIG_VENDOR_JETWAY is not set
> # CONFIG_VENDOR_KONTRON is not set
> # CONFIG_VENDOR_LANNER is not set
> # CONFIG_VENDOR_LENOVO is not set
> # CONFIG_VENDOR_LINUTOP is not set
> # CONFIG_VENDOR_LIPPERT is not set
> # CONFIG_VENDOR_MITAC is not set
> # CONFIG_VENDOR_MSI is not set
> # CONFIG_VENDOR_NEC is not set
> # CONFIG_VENDOR_NEWISYS is not set
> # CONFIG_VENDOR_NOKIA is not set
> # CONFIG_VENDOR_NVIDIA is not set
> # CONFIG_VENDOR_PCENGINES is not set
> # CONFIG_VENDOR_RCA is not set
> # CONFIG_VENDOR_RODA is not set
> # CONFIG_VENDOR_SAMSUNG is not set
> # CONFIG_VENDOR_SIEMENS is not set
> # CONFIG_VENDOR_SOYO is not set
> # CONFIG_VENDOR_SUNW is not set
> # CONFIG_VENDOR_SUPERMICRO is not set
> # CONFIG_VENDOR_TECHNEXION is not set
> # CONFIG_VENDOR_TECHNOLOGIC is not set
> # CONFIG_VENDOR_TELEVIDEO is not set
> # CONFIG_VENDOR_TI is not set
> # CONFIG_VENDOR_THOMSON is not set
> # CONFIG_VENDOR_TRAVERSE is not set
> # CONFIG_VENDOR_TYAN is not set
> # CONFIG_VENDOR_VIA is not set
> # CONFIG_VENDOR_WINENT is not set
> # CONFIG_VENDOR_WYSE is not set
> CONFIG_BOARD_SPECIFIC_OPTIONS=y
> CONFIG_MAINBOARD_DIR="asus/f2a85-m"
> CONFIG_MAINBOARD_PART_NUMBER="F2A85-M"
> CONFIG_IRQ_SLOT_COUNT=11
> CONFIG_MAINBOARD_VENDOR="ASUS"
> CONFIG_APIC_ID_OFFSET=0x0
> CONFIG_HW_MEM_HOLE_SIZEK=0x200000
> CONFIG_MAX_CPUS=4
> CONFIG_MAX_PHYSICAL_CPUS=1
> # CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC is not set
> CONFIG_RAMTOP=0x1000000
> CONFIG_HEAP_SIZE=0xc0000
> CONFIG_RAMBASE=0x200000
> CONFIG_VGA_BIOS_ID="1002,9993"
> CONFIG_DRIVERS_PS2_KEYBOARD=y
> # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
> # CONFIG_VGA_BIOS is not set
> # CONFIG_CONSOLE_POST is not set
> # CONFIG_UDELAY_IO is not set
> CONFIG_DCACHE_RAM_BASE=0x30000
> CONFIG_DCACHE_RAM_SIZE=0x10000
> CONFIG_SERIAL_CPU_INIT=y
> CONFIG_ACPI_SSDTX_NUM=0
> CONFIG_HUDSON_LEGACY_FREE=y
> # CONFIG_BOARD_ASUS_A8N_E is not set
> # CONFIG_BOARD_ASUS_A8N_SLI is not set
> # CONFIG_BOARD_ASUS_A8V_E_SE is not set
> # CONFIG_BOARD_ASUS_A8V_E_DELUXE is not set
> CONFIG_BOARD_ASUS_F2A85_M=y
> # CONFIG_BOARD_ASUS_K8V_X is not set
> # CONFIG_BOARD_ASUS_M2N_E is not set
> # CONFIG_BOARD_ASUS_M2V is not set
> # CONFIG_BOARD_ASUS_M2V_MX_SE is not set
> # CONFIG_BOARD_ASUS_M4A785M is not set
> # CONFIG_BOARD_ASUS_M4A785TM is not set
> # CONFIG_BOARD_ASUS_M4A78_EM is not set
> # CONFIG_BOARD_ASUS_M5A88_V is not set
> # CONFIG_BOARD_ASUS_MEW_AM is not set
> # CONFIG_BOARD_ASUS_MEW_VM is not set
> # CONFIG_BOARD_ASUS_P2B is not set
> # CONFIG_BOARD_ASUS_P2B_D is not set
> # CONFIG_BOARD_ASUS_P2B_DS is not set
> # CONFIG_BOARD_ASUS_P2B_F is not set
> # CONFIG_BOARD_ASUS_P2B_LS is not set
> # CONFIG_BOARD_ASUS_P3B_F is not set
> # CONFIG_BOARD_ASUS_DSBF is not set
> # CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_135 is not set
> CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_150=y
> # CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_165 is not set
> CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL=0x0
> # CONFIG_PCI_64BIT_PREF_MEM is not set
> CONFIG_MMCONF_BASE_ADDRESS=0xF8000000
> CONFIG_ID_SECTION_OFFSET=0x80
> CONFIG_STACK_SIZE=0x1000
> CONFIG_XIP_ROM_SIZE=0x100000
> # CONFIG_MMCONF_SUPPORT_DEFAULT is not set
> CONFIG_UDELAY_LAPIC_FIXED_FSB=200
> # CONFIG_VGA is not set
> CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
> CONFIG_SEABIOS_PS2_TIMEOUT=0
> CONFIG_MAINBOARD_VERSION="1.0"
> CONFIG_CPU_ADDR_BITS=48
> CONFIG_CACHE_ROM_SIZE_OVERRIDE=0
> # CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
> CONFIG_LOGICAL_CPUS=y
> CONFIG_IOAPIC=y
> CONFIG_SMP=y
> CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
> # CONFIG_USBDEBUG is not set
> CONFIG_BOARD_ROMSIZE_KB_8192=y
> # CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
> # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
> # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
> # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
> # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
> # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
> # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
> CONFIG_COREBOOT_ROMSIZE_KB_8192=y
> # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
> # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
> CONFIG_COREBOOT_ROMSIZE_KB=8192
> CONFIG_ROM_SIZE=0x800000
> CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
> CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="F2A85-M"
> CONFIG_ARCH_X86=y
> # CONFIG_ARCH_ARMV7 is not set
>
> #
> # Architecture (x86)
> #
> CONFIG_X86_ARCH_OPTIONS=y
> # CONFIG_AP_IN_SIPI_WAIT is not set
> # CONFIG_SIPI_VECTOR_IN_ROM is not set
> CONFIG_MAX_REBOOT_CNT=3
> CONFIG_NUM_IPI_STARTS=2
> CONFIG_X86_BOOTBLOCK_SIMPLE=y
> # CONFIG_X86_BOOTBLOCK_NORMAL is not set
> CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
> # CONFIG_UPDATE_IMAGE is not set
> # CONFIG_ROMCC is not set
> CONFIG_PC80_SYSTEM=y
> # CONFIG_HAVE_CMOS_DEFAULT is not set
>
> CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/agesa/hudson/bootblock.c"
> CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
> # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
> CONFIG_HPET_ADDRESS=0xfed00000
> CONFIG_HAVE_ARCH_MEMSET=y
> CONFIG_HAVE_ARCH_MEMCPY=y
> CONFIG_HAVE_ARCH_MEMMOVE=y
> # CONFIG_MAINBOARD_HAS_CHROMEOS is not set
>
> #
> # Chipset
> #
>
> #
> # CPU
> #
> CONFIG_CPU_SOCKET_TYPE=0x10
> # CONFIG_EXT_RT_TBL_SUPPORT is not set
> # CONFIG_EXT_CONF_SUPPORT is not set
> CONFIG_CBB=0x0
> CONFIG_CDB=0x18
> CONFIG_DIMM_SUPPORT=0x0104
> CONFIG_LIFT_BSP_APIC_ID=y
> CONFIG_CPU_AMD_AGESA=y
> CONFIG_HAVE_INIT_TIMER=y
> CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0xA1000
> CONFIG_CPU_AMD_AGESA_FAMILY15_TN=y
> CONFIG_SMM_TSEG_SIZE=0
> # CONFIG_SSE2 is not set
> # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
> # CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
> CONFIG_UDELAY_LAPIC=y
> CONFIG_LAPIC_MONOTONIC_TIMER=y
> # CONFIG_UDELAY_TSC is not set
> # CONFIG_UDELAY_TIMER2 is not set
> # CONFIG_TSC_CALIBRATE_WITH_IO is not set
> CONFIG_TSC_SYNC_LFENCE=y
> # CONFIG_TSC_SYNC_MFENCE is not set
> # CONFIG_SMM_TSEG is not set
> CONFIG_X86_AMD_FIXED_MTRRS=y
> # CONFIG_PARALLEL_MP is not set
> # CONFIG_BACKUP_DEFAULT_SMM_REGION is not set
> CONFIG_CACHE_AS_RAM=y
> CONFIG_AP_SIPI_VECTOR=0xfffff000
> # CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set
> # CONFIG_CPU_MICROCODE_CBFS_GENERATE is not set
> # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set
> CONFIG_CPU_MICROCODE_CBFS_NONE=y
>
> #
> # Northbridge
> #
> CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
> CONFIG_VIDEO_MB=0
> CONFIG_AMDMCT=y
> CONFIG_MMCONF_BUS_NUMBER=64
> CONFIG_NORTHBRIDGE_AMD_AGESA=y
> # CONFIG_CONSOLE_VGA_MULTI is not set
> # CONFIG_S3_VGA_ROM_RUN is not set
> CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN=y
> # CONFIG_AMD_NB_CIMX is not set
> # CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
> CONFIG_CBFS_SIZE=0x800000
> CONFIG_MAX_PIRQ_LINKS=4
>
> #
> # Southbridge
> #
> CONFIG_EHCI_BAR=0xfef00000
> # CONFIG_AMD_SB_CIMX is not set
> CONFIG_S3_DATA_POS=0xFFFF0000
> CONFIG_S3_DATA_SIZE=32768
> # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
> # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
> CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON=y
> # CONFIG_SOUTHBRIDGE_AMD_HUDSON_SKIP_ISA_DMA_INIT is not set
> CONFIG_HUDSON_XHCI_ENABLE=y
> CONFIG_HUDSON_XHCI_FWM=y
> CONFIG_HUDSON_IMC_FWM=y
> # CONFIG_HUDSON_GEC_FWM is not set
> CONFIG_HUDSON_XHCI_FWM_FILE="3rdparty/southbridge/amd/hudson/xhci.bin"
> CONFIG_HUDSON_IMC_FWM_FILE="3rdparty/southbridge/amd/hudson/imc.bin"
> CONFIG_HUDSON_FWM=y
> CONFIG_HUDSON_FWM_POSITION=0xFF820000
> CONFIG_HUDSON_SATA_IDE=y
> # CONFIG_HUDSON_SATA_RAID is not set
> # CONFIG_HUDSON_SATA_AHCI is not set
> # CONFIG_HUDSON_SATA_LEGACY_IDE is not set
> # CONFIG_HUDSON_SATA_IDE2AHCI is not set
> # CONFIG_HUDSON_SATA_AHCI7804 is not set
> # CONFIG_HUDSON_SATA_IDE2AHCI7804 is not set
> CONFIG_HUDSON_SATA_MODE=0x0
> CONFIG_AMD_SB_SPI_TX_LEN=4
> CONFIG_SPI_FLASH=y
> # CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
>
> #
> # Super I/O
> #
> CONFIG_SUPERIO_ITE_IT8712F=y
>
> #
> # Embedded Controllers
> #
>
> #
> # SoC
> #
>
> #
> # Devices
> #
> # CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
> # CONFIG_VGA_ROM_RUN is not set
> # CONFIG_ON_DEVICE_ROM_RUN is not set
> # CONFIG_MULTIPLE_VGA_ADAPTERS is not set
> CONFIG_PCI=y
> # CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
> CONFIG_PCIX_PLUGIN_SUPPORT=y
> CONFIG_PCIEXP_PLUGIN_SUPPORT=y
> CONFIG_AGP_PLUGIN_SUPPORT=y
> CONFIG_CARDBUS_PLUGIN_SUPPORT=y
> # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
> # CONFIG_PCIEXP_COMMON_CLOCK is not set
> # CONFIG_PCIEXP_ASPM is not set
> CONFIG_PCI_BUS_SEGN_BITS=0
>
> #
> # VGA BIOS
> #
>
> #
> # PXE ROM
> #
> # CONFIG_PXE_ROM is not set
> CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
> CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
>
> #
> # Generic Drivers
> #
> # CONFIG_ELOG is not set
> # CONFIG_DRIVERS_I2C_RTD2132 is not set
> # CONFIG_INTEL_DP is not set
> # CONFIG_INTEL_DDI is not set
> # CONFIG_IPMI_KCS is not set
> # CONFIG_DRIVER_MAXIM_MAX77686 is not set
> # CONFIG_DRIVERS_OXFORD_OXPCIE is not set
> # CONFIG_DRIVER_PARADE_PS8625 is not set
> # CONFIG_TPM is not set
> # CONFIG_RTL8168_ROM_DISABLE is not set
> # CONFIG_DRIVERS_SIL_3114 is not set
> CONFIG_SPI_FLASH_AMIC=y
> CONFIG_SPI_FLASH_EON=y
> CONFIG_SPI_FLASH_MACRONIX=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_SPI_FLASH_SST=y
> CONFIG_SPI_FLASH_STMICRO=y
> CONFIG_SPI_FLASH_WINBOND=y
> # CONFIG_SPI_FLASH_NO_FAST_READ is not set
> CONFIG_SPI_FLASH_GIGADEVICE=y
> # CONFIG_DRIVER_TI_TPS65090 is not set
> CONFIG_HAVE_UART_IO_MAPPED=y
> # CONFIG_HAVE_UART_MEMORY_MAPPED is not set
> # CONFIG_HAVE_UART_SPECIAL is not set
> # CONFIG_DRIVER_XPOWERS_AXP209 is not set
> CONFIG_MMCONF_SUPPORT=y
>
> #
> # Console
> #
> CONFIG_EARLY_CONSOLE=y
> CONFIG_SQUELCH_EARLY_SMP=y
> CONFIG_CONSOLE_SERIAL=y
> CONFIG_CONSOLE_SERIAL8250=y
> CONFIG_CONSOLE_SERIAL_COM1=y
> # CONFIG_CONSOLE_SERIAL_COM2 is not set
> # CONFIG_CONSOLE_SERIAL_COM3 is not set
> # CONFIG_CONSOLE_SERIAL_COM4 is not set
> CONFIG_TTYS0_BASE=0x3f8
> CONFIG_CONSOLE_SERIAL_115200=y
> # CONFIG_CONSOLE_SERIAL_57600 is not set
> # CONFIG_CONSOLE_SERIAL_38400 is not set
> # CONFIG_CONSOLE_SERIAL_19200 is not set
> # CONFIG_CONSOLE_SERIAL_9600 is not set
> CONFIG_TTYS0_BAUD=115200
> CONFIG_TTYS0_LCS=3
> # CONFIG_SPKMODEM is not set
> CONFIG_HAVE_USBDEBUG=y
> CONFIG_HAVE_USBDEBUG_OPTIONS=y
> # CONFIG_CONSOLE_NE2K is not set
> # CONFIG_CONSOLE_CBMEM is not set
> CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
> # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
> # CONFIG_NO_POST is not set
> # CONFIG_CMOS_POST is not set
> CONFIG_IO_POST=y
> CONFIG_IO_POST_PORT=0x80
> CONFIG_HAVE_ACPI_RESUME=y
> # CONFIG_HAVE_ACPI_SLIC is not set
> CONFIG_HAVE_HARD_RESET=y
> CONFIG_HAVE_MONOTONIC_TIMER=y
> # CONFIG_TIMER_QUEUE is not set
> CONFIG_HAVE_OPTION_TABLE=y
> # CONFIG_PIRQ_ROUTE is not set
> # CONFIG_HAVE_SMI_HANDLER is not set
> CONFIG_PCI_IO_CFG_EXT=y
> # CONFIG_USE_WATCHDOG_ON_BOOT is not set
> CONFIG_GFXUMA=y
> # CONFIG_RELOCATABLE_MODULES is not set
> # CONFIG_HAVE_REFCODE_BLOB is not set
> CONFIG_HAVE_ACPI_TABLES=y
> CONFIG_HAVE_MP_TABLE=y
> CONFIG_HAVE_PIRQ_TABLE=y
>
> #
> # System tables
> #
> CONFIG_GENERATE_ACPI_TABLES=y
> CONFIG_GENERATE_MP_TABLE=y
> CONFIG_GENERATE_PIRQ_TABLE=y
> CONFIG_GENERATE_SMBIOS_TABLES=y
>
> #
> # Payload
> #
> # CONFIG_PAYLOAD_NONE is not set
> # CONFIG_PAYLOAD_ELF is not set
> # CONFIG_PAYLOAD_LINUX is not set
> CONFIG_PAYLOAD_SEABIOS=y
> # CONFIG_PAYLOAD_FILO is not set
> # CONFIG_PAYLOAD_GRUB2 is not set
> # CONFIG_PAYLOAD_TIANOCORE is not set
> CONFIG_SEABIOS_STABLE=y
> # CONFIG_SEABIOS_MASTER is not set
> CONFIG_PAYLOAD_FILE="$(obj)/seabios/out/bios.bin.elf"
> CONFIG_COMPRESSED_PAYLOAD_LZMA=y
>
> #
> # Debugging
> #
> # CONFIG_GDB_STUB is not set
> CONFIG_DEBUG_CBFS=y
> # CONFIG_HAVE_DEBUG_RAM_SETUP is not set
> # CONFIG_HAVE_DEBUG_CAR is not set
> # CONFIG_DEBUG_PIRQ is not set
> # CONFIG_HAVE_DEBUG_SMBUS is not set
> CONFIG_DEBUG_MALLOC=y
> CONFIG_DEBUG_ACPI=y
> CONFIG_DEBUG_SPI_FLASH=y
> # CONFIG_TRACE is not set
> # CONFIG_ENABLE_APIC_EXT_ID is not set
> CONFIG_WARNINGS_ARE_ERRORS=y
> # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
> # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
> # CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
> # CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
> -------------- next part --------------
>
>
> coreboot-4.0-5584-ge92155f-dirty Sat Mar  1 21:05:40 CET 2014 starting...
> BSP Family_Model: 00610f01
> cpu_init_detectedx = 00000000
> agesawrapper_amdinitreset Fch OEM config in INIT RESET Done
> Got past agesawrapper_amdinitearly
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a021, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
>
> EventLog:  EventClass = 2, EventInfo = 8040100.
>   Param1 = a00a, Param2 = 0.
>   Param3 = 0, Param4 = 0.
> agesawrapper_amdinitpost failed: 4
> Got past agesawrapper_amdinitpost
> Fch OEM config in INIT ENV Done
> Got past agesawrapper_amdinitenv
> Trying CBFS ramstage loader.
> CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc50/0x800000
> CBFS: CBFS location: 0x0~0x7ffc70, align: 64
> CBFS: Looking for 'fallback/coreboot_ram' starting from 0x0.
> CBFS:  - load entry 0x0 file name (16 bytes)...
> CBFS:  (unmatched file @0x0: cmos_layout.bin)
> CBFS:  - load entry 0x740 file name (32 bytes)...
> CBFS:  (unmatched file @0x740: fallback/payload)
> CBFS:  - load entry 0xdac0 file name (16 bytes)...
> CBFS:  (unmatched file @0xdac0: config)
> CBFS:  - load entry 0xed00 file name (16 bytes)...
> CBFS:  (unmatched file @0xed00: )
> CBFS:  - load entry 0x1ffc0 file name (40 bytes)...
> CBFS:  (unmatched file @0x1ffc0: hudson/fwm)
> CBFS:  - load entry 0x20040 file name (56 bytes)...
> CBFS:  (unmatched file @0x20040: hudson/xhci)
> CBFS:  - load entry 0x26240 file name (16 bytes)...
> CBFS:  (unmatched file @0x26240: )
> CBFS:  - load entry 0x2ffc0 file name (40 bytes)...
> CBFS:  (unmatched file @0x2ffc0: hudson/imc)
> CBFS:  - load entry 0x40000 file name (32 bytes)...
> CBFS:  (unmatched file @0x40000: fallback/romstage)
> CBFS:  - load entry 0xc1a80 file name (32 bytes)...
> CBFS: Found file (offset=0xc1ab8, len=281644).
> CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1560624 bytes),
> entry @ 0x200000
> CBFS: stage loaded.
> coreboot-4.0-5584-ge92155f-dirty Sat Mar  1 21:05:40 CET 2014 booting...
> BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
> BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 0 exit 0
> Enumerating buses...
> Show all devs...Before device enumeration.
> Root Device: enabled 1
> CPU_CLUSTER: 0: enabled 1
> APIC: 10: enabled 1
> DOMAIN: 0000: enabled 1
> PCI: 00:00.0: enabled 1
> PCI: 00:01.0: enabled 1
> PCI: 00:01.1: enabled 1
> PCI: 00:02.0: enabled 1
> PCI: 00:03.0: enabled 0
> PCI: 00:04.0: enabled 1
> PCI: 00:05.0: enabled 0
> PCI: 00:06.0: enabled 0
> PCI: 00:07.0: enabled 0
> PCI: 00:08.0: enabled 0
> PCI: 00:10.0: enabled 1
> PCI: 00:10.1: enabled 1
> PCI: 00:11.0: enabled 1
> PCI: 00:12.0: enabled 1
> PCI: 00:12.2: enabled 1
> PCI: 00:13.0: enabled 1
> PCI: 00:13.2: enabled 1
> PCI: 00:14.0: enabled 1
> I2C: 00:50: enabled 1
> I2C: 00:51: enabled 1
> PCI: 00:14.1: enabled 0
> PCI: 00:14.2: enabled 1
> PCI: 00:14.3: enabled 1
> PNP: 002e.0: enabled 0
> PNP: 002e.1: enabled 1
> PNP: 002e.2: enabled 0
> PNP: 002e.3: enabled 0
> PNP: 002e.4: enabled 0
> PNP: 002e.5: enabled 1
> PNP: 002e.6: enabled 0
> PNP: 002e.7: enabled 0
> PNP: 002e.8: enabled 0
> PNP: 002e.9: enabled 0
> PNP: 002e.a: enabled 0
> PCI: 00:14.4: enabled 1
> PCI: 00:14.5: enabled 1
> PCI: 00:14.6: enabled 0
> PCI: 00:14.7: enabled 1
> PCI: 00:15.0: enabled 1
> PCI: 00:15.1: enabled 1
> PCI: 00:15.2: enabled 0
> PCI: 00:15.3: enabled 0
> PCI: 00:18.0: enabled 1
> PCI: 00:18.1: enabled 1
> PCI: 00:18.2: enabled 1
> PCI: 00:18.3: enabled 1
> PCI: 00:18.4: enabled 1
> PCI: 00:18.5: enabled 1
> Compare with tree...
> Root Device: enabled 1
>  CPU_CLUSTER: 0: enabled 1
>   APIC: 10: enabled 1
>  DOMAIN: 0000: enabled 1
>   PCI: 00:00.0: enabled 1
>   PCI: 00:01.0: enabled 1
>   PCI: 00:01.1: enabled 1
>   PCI: 00:02.0: enabled 1
>   PCI: 00:03.0: enabled 0
>   PCI: 00:04.0: enabled 1
>   PCI: 00:05.0: enabled 0
>   PCI: 00:06.0: enabled 0
>   PCI: 00:07.0: enabled 0
>   PCI: 00:08.0: enabled 0
>   PCI: 00:10.0: enabled 1
>   PCI: 00:10.1: enabled 1
>   PCI: 00:11.0: enabled 1
>   PCI: 00:12.0: enabled 1
>   PCI: 00:12.2: enabled 1
>   PCI: 00:13.0: enabled 1
>   PCI: 00:13.2: enabled 1
>   PCI: 00:14.0: enabled 1
>    I2C: 00:50: enabled 1
>    I2C: 00:51: enabled 1
>   PCI: 00:14.1: enabled 0
>   PCI: 00:14.2: enabled 1
>   PCI: 00:14.3: enabled 1
>    PNP: 002e.0: enabled 0
>    PNP: 002e.1: enabled 1
>    PNP: 002e.2: enabled 0
>    PNP: 002e.3: enabled 0
>    PNP: 002e.4: enabled 0
>    PNP: 002e.5: enabled 1
>    PNP: 002e.6: enabled 0
>    PNP: 002e.7: enabled 0
>    PNP: 002e.8: enabled 0
>    PNP: 002e.9: enabled 0
>    PNP: 002e.a: enabled 0
>   PCI: 00:14.4: enabled 1
>   PCI: 00:14.5: enabled 1
>   PCI: 00:14.6: enabled 0
>   PCI: 00:14.7: enabled 1
>   PCI: 00:15.0: enabled 1
>   PCI: 00:15.1: enabled 1
>   PCI: 00:15.2: enabled 0
>   PCI: 00:15.3: enabled 0
>   PCI: 00:18.0: enabled 1
>   PCI: 00:18.1: enabled 1
>   PCI: 00:18.2: enabled 1
>   PCI: 00:18.3: enabled 1
>   PCI: 00:18.4: enabled 1
>   PCI: 00:18.5: enabled 1
> Mainboard F2A85-M Enable.
> scan_static_bus for Root Device
> setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
> setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
> setup_uma_memory: uma size 0x20000000, memory start 0xc0000000
> CPU_CLUSTER: 0 enabled
> DOMAIN: 0000 enabled
> CPU_CLUSTER: 0 scanning...
> memalign Enter, boundary 8, size 96, free_mem_ptr 002bd030
> memalign 002bd030
> PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x3
> lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10
> CPU: APIC: 10 enabled
> lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11
> memalign Enter, boundary 8, size 152, free_mem_ptr 002bd090
> memalign 002bd090
> CPU: APIC: 11 enabled
> lpaicid_start=0x10 node 0x0 core 0x2 apicid=0x12
> memalign Enter, boundary 8, size 152, free_mem_ptr 002bd128
> memalign 002bd128
> CPU: APIC: 12 enabled
> lpaicid_start=0x10 node 0x0 core 0x3 apicid=0x13
> memalign Enter, boundary 8, size 152, free_mem_ptr 002bd1c0
> memalign 002bd1c0
> CPU: APIC: 13 enabled
> DOMAIN: 0000 scanning...
> PCI: pci_scan_bus for bus 00
> PCI: 00:00.0 [1022/1410] enabled
> PCI: 00:01.0 [1002/9904] enabled
> PCI: 00:01.1 [1002/9902] enabled
> PCI: Static device PCI: 00:02.0 not found, disabling it.
> PCI: Static device PCI: 00:04.0 not found, disabling it.
> hudson_enable()
> PCI: 00:10.0 [1022/7812] enabled
> hudson_enable()
> PCI: 00:10.1 [1022/7812] enabled
> hudson_enable()
> PCI: 00:11.0 [1022/7801] ops
> PCI: 00:11.0 [1022/7801] enabled
> hudson_enable()
> PCI: 00:12.0 [1022/7807] ops
> PCI: 00:12.0 [1022/7807] enabled
> hudson_enable()
> PCI: 00:12.2 [1022/7808] ops
> PCI: 00:12.2 [1022/7808] enabled
> hudson_enable()
> PCI: 00:13.0 [1022/7807] ops
> PCI: 00:13.0 [1022/7807] enabled
> hudson_enable()
> PCI: 00:13.2 [1022/7808] ops
> PCI: 00:13.2 [1022/7808] enabled
> hudson_enable()
> PCI: 00:14.0 [1022/780b] bus ops
> PCI: 00:14.0 [1022/780b] enabled
> hudson_enable()
> hudson_enable()
> PCI: 00:14.2 [1022/780d] ops
> PCI: 00:14.2 [1022/780d] enabled
> hudson_enable()
> PCI: 00:14.3 [1022/780e] bus ops
> PCI: 00:14.3 [1022/780e] enabled
> hudson_enable()
> PCI: 00:14.4 [1022/780f] bus ops
> PCI: 00:14.4 [1022/780f] enabled
> hudson_enable()
> PCI: 00:14.5 [1022/7809] ops
> PCI: 00:14.5 [1022/7809] enabled
> hudson_enable()
> hudson_enable()
> PCI: 00:14.7 [1022/7806] enabled
> hudson_enable()
> PCI: 00:15.0 [1022/43a0] bus ops
> PCI: 00:15.0 [1022/43a0] enabled
> hudson_enable()
> PCI: 00:15.1 [1022/43a1] bus ops
> PCI: 00:15.1 [1022/43a1] enabled
> hudson_enable()
> hudson_enable()
> PCI: 00:18.0 [1022/1400] ops
> PCI: 00:18.0 [1022/1400] enabled
> PCI: 00:18.1 [1022/1401] enabled
> PCI: 00:18.2 [1022/1402] enabled
> PCI: 00:18.3 [1022/1403] enabled
> PCI: 00:18.4 [1022/1404] enabled
> PCI: 00:18.5 [1022/1405] enabled
> scan_static_bus for PCI: 00:14.0
> smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
> smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled
> scan_static_bus for PCI: 00:14.0 done
> scan_static_bus for PCI: 00:14.3
> memalign Enter, boundary 8, size 2560, free_mem_ptr 002bd258
> memalign 002bd258
> PNP: 002e.0 disabled
> PNP: 002e.1 enabled
> PNP: 002e.2 disabled
> PNP: 002e.3 disabled
> PNP: 002e.4 disabled
> PNP: 002e.5 enabled
> PNP: 002e.6 disabled
> PNP: 002e.7 disabled
> PNP: 002e.8 disabled
> PNP: 002e.9 disabled
> PNP: 002e.a disabled
> scan_static_bus for PCI: 00:14.3 done
> do_pci_scan_bridge for PCI: 00:14.4
> memalign Enter, boundary 8, size 24, free_mem_ptr 002bdc58
> memalign 002bdc58
> PCI: pci_scan_bus for bus 01
> PCI: pci_scan_bus returning with max=001
> do_pci_scan_bridge returns max 1
> do_pci_scan_bridge for PCI: 00:15.0
> memalign Enter, boundary 8, size 24, free_mem_ptr 002bdc70
> memalign 002bdc70
> PCI: pci_scan_bus for bus 02
> PCI: pci_scan_bus returning with max=002
> do_pci_scan_bridge returns max 2
> do_pci_scan_bridge for PCI: 00:15.1
> memalign Enter, boundary 8, size 24, free_mem_ptr 002bdc88
> memalign 002bdc88
> PCI: pci_scan_bus for bus 03
> memalign Enter, boundary 8, size 152, free_mem_ptr 002bdca0
> memalign 002bdca0
> PCI: 03:00.0 [10ec/8168] enabled
> PCI: pci_scan_bus returning with max=003
> do_pci_scan_bridge returns max 3
> PCI: pci_scan_bus returning with max=003
> scan_static_bus for Root Device done
> done
> BS: BS_DEV_ENUMERATE times (us): entry 8 run 302034 exit 0
> found VGA at PCI: 00:01.0
> Setting up VGA for PCI: 00:01.0
> Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
> Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
> Allocating resources...
> Reading resources...
> Root Device read_resources bus 0 link: 0
> CPU_CLUSTER: 0 read_resources bus 0 link: 0
> APIC: 10 missing read_resources
> APIC: 11 missing read_resources
> APIC: 12 missing read_resources
> APIC: 13 missing read_resources
> CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
> fx_devs=0x1
> DOMAIN: 0000 read_resources bus 0 link: 0
> PCI: 00:14.0 read_resources bus 1 link: 0
> I2C: 01:50 missing read_resources
> I2C: 01:51 missing read_resources
> PCI: 00:14.0 read_resources bus 1 link: 0 done
> PCI: 00:14.3 read_resources bus 0 link: 0
> PCI: 00:14.3 read_resources bus 0 link: 0 done
> PCI: 00:14.4 read_resources bus 1 link: 0
> PCI: 00:14.4 read_resources bus 1 link: 0 done
> PCI: 00:15.0 read_resources bus 2 link: 0
> PCI: 00:15.0 read_resources bus 2 link: 0 done
> PCI: 00:15.1 read_resources bus 3 link: 0
> PCI: 00:15.1 read_resources bus 3 link: 0 done
> PCI: 00:18.0 read_resources bus 0 link: 0
> PCI: 00:18.0 read_resources bus 0 link: 0 done
> PCI: 00:18.0 read_resources bus 0 link: 1
> PCI: 00:18.0 read_resources bus 0 link: 1 done
> PCI: 00:18.0 read_resources bus 0 link: 2
> PCI: 00:18.0 read_resources bus 0 link: 2 done
> PCI: 00:18.0 read_resources bus 0 link: 3
> PCI: 00:18.0 read_resources bus 0 link: 3 done
> DOMAIN: 0000 read_resources bus 0 link: 0 done
> Root Device read_resources bus 0 link: 0 done
> Done reading resources.
> Show resources in subtree (Root Device)...After reading.
>  Root Device child on link 0 CPU_CLUSTER: 0
>   CPU_CLUSTER: 0 child on link 0 APIC: 10
>    APIC: 10
>    APIC: 11
>    APIC: 12
>    APIC: 13
>   DOMAIN: 0000 child on link 0 PCI: 00:00.0
>   DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags
> 40040100 index 10000000
>   DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags
> 40040200 index 10000100
>    PCI: 00:00.0
>    PCI: 00:01.0
>    PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit
> ffffffff flags 1200 index 10
>    PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags
> 100 index 14
>    PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff
> flags 200 index 18
>    PCI: 00:01.1
>    PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff
> flags 200 index 10
>    PCI: 00:02.0
>    PCI: 00:03.0
>    PCI: 00:04.0
>    PCI: 00:05.0
>    PCI: 00:06.0
>    PCI: 00:07.0
>    PCI: 00:08.0
>    PCI: 00:10.0
>    PCI: 00:10.0 resource base 0 size 2000 align 13 gran 13 limit
> ffffffffffffffff flags 201 index 10
>    PCI: 00:10.1
>    PCI: 00:10.1 resource base 0 size 2000 align 13 gran 13 limit
> ffffffffffffffff flags 201 index 10
>    PCI: 00:11.0
>    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100
> index 10
>    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100
> index 14
>    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100
> index 18
>    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100
> index 1c
>    PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags
> 100 index 20
>    PCI: 00:11.0 resource base 0 size 800 align 11 gran 11 limit ffffffff
> flags 200 index 24
>    PCI: 00:12.0
>    PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff
> flags 200 index 10
>    PCI: 00:12.2
>    PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff
> flags 200 index 10
>    PCI: 00:13.0
>    PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff
> flags 200 index 10
>    PCI: 00:13.2
>    PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff
> flags 200 index 10
>    PCI: 00:14.0 child on link 0 I2C: 01:50
>     I2C: 01:50
>     I2C: 01:51
>    PCI: 00:14.1
>    PCI: 00:14.2
>    PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit
> ffffffffffffffff flags 201 index 10
>    PCI: 00:14.3 child on link 0 PNP: 002e.0
>    PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffef flags
> 200 index a0
>    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags
> c0040100 index 10000000
>    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0
> flags c0040200 index 10000100
>     PNP: 002e.0
>     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags
> c0000100 index 60
>     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags
> c0000800 index 74
>     PNP: 002e.1
>     PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags
> c0000100 index 60
>     PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.2
>     PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags
> c0000100 index 60
>     PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.3
>     PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags
> c0000100 index 60
>     PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800
> index 74
>     PNP: 002e.4
>     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 60
>     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 62
>     PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
> index 70
>     PNP: 002e.5
>     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff
> flags c0000100 index 60
>     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff
> flags c0000100 index 62
>     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.6
>     PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.7
>     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
> 100 index 60
>     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 62
>     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 64
>     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
> index 70
>     PNP: 002e.8
>     PNP: 002e.8 resource base 300 size 8 align 3 gran 3 limit fff flags
> c0000100 index 60
>     PNP: 002e.8 resource base 9 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.9
>     PNP: 002e.9 resource base 220 size 1 align 0 gran 0 limit ffffffff
> flags c0000100 index 60
>     PNP: 002e.a
>     PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 60
>     PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400
> index 70
>    PCI: 00:14.4
>    PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags
> 80102 index 1c
>    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff
> flags 81202 index 24
>    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff
> flags 80202 index 20
>    PCI: 00:14.5
>    PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff
> flags 200 index 10
>    PCI: 00:14.6
>    PCI: 00:14.7
>    PCI: 00:14.7 resource base 0 size 100 align 8 gran 8 limit
> ffffffffffffffff flags 201 index 10
>    PCI: 00:15.0
>    PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff
> flags 80102 index 1c
>    PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
>    PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff
> flags 80202 index 20
>    PCI: 00:15.1 child on link 0 PCI: 03:00.0
>    PCI: 00:15.1 resource base 0 size 0 align 12 gran 12 limit ffffffff
> flags 80102 index 1c
>    PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
>    PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffff
> flags 80202 index 20
>     PCI: 03:00.0
>     PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags
> 100 index 10
>     PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit
> ffffffffffffffff flags 1201 index 18
>     PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit
> ffffffffffffffff flags 1201 index 20
>    PCI: 00:15.2
>    PCI: 00:15.3
>    PCI: 00:18.0
>    PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0
> flags f0000200 index c0010058
>    PCI: 00:18.1
>    PCI: 00:18.2
>    PCI: 00:18.3
>    PCI: 00:18.4
>    PCI: 00:18.5
> DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit:
> ffff
> PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
> limit: ffff
> PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
> limit: ffff done
> PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
> limit: ffffffff
> PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
> limit: ffffffff done
> PCI: 00:15.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
> limit: ffffffff
> PCI: 03:00.0 10 *  [0x0 - 0xff] io
> PCI: 00:15.1 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12
> limit: ffff done
> PCI: 00:15.1 1c *  [0x0 - 0xfff] io
> PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
> PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
> PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
> PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
> PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
> PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
> DOMAIN: 0000 compute_resources_io: base: 1428 size: 1428 align: 12 gran: 0
> limit: ffff done
> DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0
> limit: ffffffff
> PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff
> PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff done
> PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff
> PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff done
> PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffffffffffff
> PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffffffffffff done
> PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff
> PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff done
> PCI: 00:15.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffffffffffff
> PCI: 03:00.0 20 *  [0x0 - 0x3fff] prefmem
> PCI: 03:00.0 18 *  [0x4000 - 0x4fff] prefmem
> PCI: 00:15.1 compute_resources_prefmem: base: 5000 size: 100000 align: 20
> gran: 20 limit: ffffffffffffffff done
> PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff
> PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
> limit: ffffffff done
> PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
> PCI: 00:15.1 24 *  [0x10000000 - 0x100fffff] prefmem
> PCI: 00:01.0 18 *  [0x10100000 - 0x1013ffff] mem
> PCI: 00:01.1 10 *  [0x10140000 - 0x10143fff] mem
> PCI: 00:14.2 10 *  [0x10144000 - 0x10147fff] mem
> PCI: 00:10.0 10 *  [0x10148000 - 0x10149fff] mem
> PCI: 00:10.1 10 *  [0x1014a000 - 0x1014bfff] mem
> PCI: 00:12.0 10 *  [0x1014c000 - 0x1014cfff] mem
> PCI: 00:13.0 10 *  [0x1014d000 - 0x1014dfff] mem
> PCI: 00:14.5 10 *  [0x1014e000 - 0x1014efff] mem
> PCI: 00:11.0 24 *  [0x1014f000 - 0x1014f7ff] mem
> PCI: 00:12.2 10 *  [0x1014f800 - 0x1014f8ff] mem
> PCI: 00:13.2 10 *  [0x1014f900 - 0x1014f9ff] mem
> PCI: 00:14.7 10 *  [0x1014fa00 - 0x1014faff] mem
> PCI: 00:14.3 a0 *  [0x1014fb00 - 0x1014fb00] mem
> DOMAIN: 0000 compute_resources_mem: base: 1014fb01 size: 1014fb01 align:
> 28 gran: 0 limit: ffffffef done
> avoid_fixed_resources: DOMAIN: 0000
> avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
> avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffef
> constrain_resources: DOMAIN: 0000
> constrain_resources: PCI: 00:00.0
> constrain_resources: PCI: 00:01.0
> constrain_resources: PCI: 00:01.1
> constrain_resources: PCI: 00:10.0
> constrain_resources: PCI: 00:10.1
> constrain_resources: PCI: 00:11.0
> constrain_resources: PCI: 00:12.0
> constrain_resources: PCI: 00:12.2
> constrain_resources: PCI: 00:13.0
> constrain_resources: PCI: 00:13.2
> constrain_resources: PCI: 00:14.0
> constrain_resources: I2C: 01:50
> constrain_resources: I2C: 01:51
> constrain_resources: PCI: 00:14.2
> constrain_resources: PCI: 00:14.3
> constrain_resources: PNP: 002e.1
> constrain_resources: PNP: 002e.5
> constrain_resources: PCI: 00:14.4
> constrain_resources: PCI: 00:14.5
> constrain_resources: PCI: 00:14.7
> constrain_resources: PCI: 00:15.0
> constrain_resources: PCI: 00:15.1
> constrain_resources: PCI: 03:00.0
> constrain_resources: PCI: 00:18.0
> constrain_resources: PCI: 00:18.1
> constrain_resources: PCI: 00:18.2
> constrain_resources: PCI: 00:18.3
> constrain_resources: PCI: 00:18.4
> constrain_resources: PCI: 00:18.5
> avoid_fixed_resources2: DOMAIN: 0000 at 10000000 limit 0000ffff
>         lim->base 00001000 lim->limit 0000ffff
> avoid_fixed_resources2: DOMAIN: 0000 at 10000100 limit ffffffef
>         lim->base 00000000 lim->limit f7ffffff
> Setting resources...
> DOMAIN: 0000 allocate_resources_io: base:1000 size:1428 align:12 gran:0
> limit:ffff
> Assigned: PCI: 00:15.1 1c *  [0x1000 - 0x1fff] io
> Assigned: PCI: 00:01.0 14 *  [0x2000 - 0x20ff] io
> Assigned: PCI: 00:11.0 20 *  [0x2400 - 0x240f] io
> Assigned: PCI: 00:11.0 10 *  [0x2410 - 0x2417] io
> Assigned: PCI: 00:11.0 18 *  [0x2418 - 0x241f] io
> Assigned: PCI: 00:11.0 14 *  [0x2420 - 0x2423] io
> Assigned: PCI: 00:11.0 1c *  [0x2424 - 0x2427] io
> DOMAIN: 0000 allocate_resources_io: next_base: 2428 size: 1428 align: 12
> gran: 0 done
> PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12
> limit:ffff
> PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12
> gran: 12 done
> PCI: 00:15.0 allocate_resources_io: base:ffff size:0 align:12 gran:12
> limit:ffff
> PCI: 00:15.0 allocate_resources_io: next_base: ffff size: 0 align: 12
> gran: 12 done
> PCI: 00:15.1 allocate_resources_io: base:1000 size:1000 align:12 gran:12
> limit:ffff
> Assigned: PCI: 03:00.0 10 *  [0x1000 - 0x10ff] io
> PCI: 00:15.1 allocate_resources_io: next_base: 1100 size: 1000 align: 12
> gran: 12 done
> DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:1014fb01 align:28
> gran:0 limit:f7ffffff
> Assigned: PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
> Assigned: PCI: 00:15.1 24 *  [0xf0000000 - 0xf00fffff] prefmem
> Assigned: PCI: 00:01.0 18 *  [0xf0100000 - 0xf013ffff] mem
> Assigned: PCI: 00:01.1 10 *  [0xf0140000 - 0xf0143fff] mem
> Assigned: PCI: 00:14.2 10 *  [0xf0144000 - 0xf0147fff] mem
> Assigned: PCI: 00:10.0 10 *  [0xf0148000 - 0xf0149fff] mem
> Assigned: PCI: 00:10.1 10 *  [0xf014a000 - 0xf014bfff] mem
> Assigned: PCI: 00:12.0 10 *  [0xf014c000 - 0xf014cfff] mem
> Assigned: PCI: 00:13.0 10 *  [0xf014d000 - 0xf014dfff] mem
> Assigned: PCI: 00:14.5 10 *  [0xf014e000 - 0xf014efff] mem
> Assigned: PCI: 00:11.0 24 *  [0xf014f000 - 0xf014f7ff] mem
> Assigned: PCI: 00:12.2 10 *  [0xf014f800 - 0xf014f8ff] mem
> Assigned: PCI: 00:13.2 10 *  [0xf014f900 - 0xf014f9ff] mem
> Assigned: PCI: 00:14.7 10 *  [0xf014fa00 - 0xf014faff] mem
> Assigned: PCI: 00:14.3 a0 *  [0xf014fb00 - 0xf014fb00] mem
> DOMAIN: 0000 allocate_resources_mem: next_base: f014fb01 size: 1014fb01
> align: 28 gran: 0 done
> PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20
> gran:20 limit:f7ffffff
> PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0
> align: 20 gran: 20 done
> PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20
> limit:f7ffffff
> PCI: 00:14.4 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20
> gran: 20 done
> PCI: 00:15.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20
> gran:20 limit:f7ffffff
> PCI: 00:15.0 allocate_resources_prefmem: next_base: f7ffffff size: 0
> align: 20 gran: 20 done
> PCI: 00:15.0 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20
> limit:f7ffffff
> PCI: 00:15.0 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20
> gran: 20 done
> PCI: 00:15.1 allocate_resources_prefmem: base:f0000000 size:100000
> align:20 gran:20 limit:f7ffffff
> Assigned: PCI: 03:00.0 20 *  [0xf0000000 - 0xf0003fff] prefmem
> Assigned: PCI: 03:00.0 18 *  [0xf0004000 - 0xf0004fff] prefmem
> PCI: 00:15.1 allocate_resources_prefmem: next_base: f0005000 size: 100000
> align: 20 gran: 20 done
> PCI: 00:15.1 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20
> limit:f7ffffff
> PCI: 00:15.1 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20
> gran: 20 done
> Root Device assign_resources, bus 0 link: 0
> node 0: mmio_basek=00380000, basek=00400000, limitk=00460000
> CBMEM region bf130000-bfffffff (cbmem_late_set_table)
> DOMAIN: 0000 assign_resources, bus 0 link: 0
> PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c
> prefmem
> PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08
> io
> PCI: 00:01.0 18 <- [0x00f0100000 - 0x00f013ffff] size 0x00040000 gran 0x12
> mem
> PCI: 00:01.1 10 <- [0x00f0140000 - 0x00f0143fff] size 0x00004000 gran 0x0e
> mem
> PCI: 00:10.0 10 <- [0x00f0148000 - 0x00f0149fff] size 0x00002000 gran 0x0d
> mem64
> PCI: 00:10.1 10 <- [0x00f014a000 - 0x00f014bfff] size 0x00002000 gran 0x0d
> mem64
> PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03
> io
> PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02
> io
> PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03
> io
> PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02
> io
> PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04
> io
> PCI: 00:11.0 24 <- [0x00f014f000 - 0x00f014f7ff] size 0x00000800 gran 0x0b
> mem
> PCI: 00:12.0 10 <- [0x00f014c000 - 0x00f014cfff] size 0x00001000 gran 0x0c
> mem
> PCI: 00:12.2 10 <- [0x00f014f800 - 0x00f014f8ff] size 0x00000100 gran 0x08
> mem
> PCI: 00:13.0 10 <- [0x00f014d000 - 0x00f014dfff] size 0x00001000 gran 0x0c
> mem
> PCI: 00:13.2 10 <- [0x00f014f900 - 0x00f014f9ff] size 0x00000100 gran 0x08
> mem
> PCI: 00:14.2 10 <- [0x00f0144000 - 0x00f0147fff] size 0x00004000 gran 0x0e
> mem64
> PCI: 00:14.3 a0 <- [0x00f014fb02 - 0x00f014fb02] size 0x00000001 gran 0x00
> mem
> PCI: 00:14.3 assign_resources, bus 0 link: 0
> PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03
> io
> PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00
> irq
> PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00
> io
> PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00
> io
> PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00
> irq
> PCI: 00:14.3 assign_resources, bus 0 link: 0
> PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c
> bus 01 io
> PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14
> bus 01 prefmem
> PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14
> bus 01 mem
> PCI: 00:14.5 10 <- [0x00f014e000 - 0x00f014efff] size 0x00001000 gran 0x0c
> mem
> PCI: 00:14.7 10 <- [0x00f014fa00 - 0x00f014faff] size 0x00000100 gran 0x08
> mem64
> PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c
> bus 02 io
> PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14
> bus 02 prefmem
> PCI: 00:15.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14
> bus 02 mem
> PCI: 00:15.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c
> bus 03 io
> PCI: 00:15.1 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14
> bus 03 prefmem
> PCI: 00:15.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14
> bus 03 mem
> PCI: 00:15.1 assign_resources, bus 3 link: 0
> PCI: 03:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08
> io
> PCI: 03:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c
> prefmem64
> PCI: 03:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e
> prefmem64
> PCI: 00:15.1 assign_resources, bus 3 link: 0
> PCI: 00:18.0 c0010058 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000
> gran 0x00 mem <mmconfig>
> DOMAIN: 0000 assign_resources, bus 0 link: 0
> Root Device assign_resources, bus 0 link: 0
> Done setting resources.
> Show resources in subtree (Root Device)...After assigning values.
>  Root Device child on link 0 CPU_CLUSTER: 0
>   CPU_CLUSTER: 0 child on link 0 APIC: 10
>    APIC: 10
>    APIC: 11
>    APIC: 12
>    APIC: 13
>   DOMAIN: 0000 child on link 0 PCI: 00:00.0
>   DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff
> flags 40040100 index 10000000
>   DOMAIN: 0000 resource base e0000000 size 1014fb01 align 28 gran 0 limit
> f7ffffff flags 40040200 index 10000100
>   DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags
> e0004200 index 10
>   DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0
> flags e0004200 index 20
>   DOMAIN: 0000 resource base 100000000 size 1f000000 align 0 gran 0 limit
> 0 flags e0004200 index 30
>   DOMAIN: 0000 resource base c0000000 size 20000000 align 0 gran 0 limit 0
> flags f0000200 index 7
>    PCI: 00:00.0
>    PCI: 00:01.0
>    PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28
> limit f7ffffff flags 60001200 index 10
>    PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff
> flags 60000100 index 14
>    PCI: 00:01.0 resource base f0100000 size 40000 align 18 gran 18 limit
> f7ffffff flags 60000200 index 18
>    PCI: 00:01.1
>    PCI: 00:01.1 resource base f0140000 size 4000 align 14 gran 14 limit
> f7ffffff flags 60000200 index 10
>    PCI: 00:02.0
>    PCI: 00:03.0
>    PCI: 00:04.0
>    PCI: 00:05.0
>    PCI: 00:06.0
>    PCI: 00:07.0
>    PCI: 00:08.0
>    PCI: 00:10.0
>    PCI: 00:10.0 resource base f0148000 size 2000 align 13 gran 13 limit
> f7ffffff flags 60000201 index 10
>    PCI: 00:10.1
>    PCI: 00:10.1 resource base f014a000 size 2000 align 13 gran 13 limit
> f7ffffff flags 60000201 index 10
>    PCI: 00:11.0
>    PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit ffff flags
> 60000100 index 10
>    PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit ffff flags
> 60000100 index 14
>    PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit ffff flags
> 60000100 index 18
>    PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit ffff flags
> 60000100 index 1c
>    PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit ffff flags
> 60000100 index 20
>    PCI: 00:11.0 resource base f014f000 size 800 align 11 gran 11 limit
> f7ffffff flags 60000200 index 24
>    PCI: 00:12.0
>    PCI: 00:12.0 resource base f014c000 size 1000 align 12 gran 12 limit
> f7ffffff flags 60000200 index 10
>    PCI: 00:12.2
>    PCI: 00:12.2 resource base f014f800 size 100 align 8 gran 8 limit
> f7ffffff flags 60000200 index 10
>    PCI: 00:13.0
>    PCI: 00:13.0 resource base f014d000 size 1000 align 12 gran 12 limit
> f7ffffff flags 60000200 index 10
>    PCI: 00:13.2
>    PCI: 00:13.2 resource base f014f900 size 100 align 8 gran 8 limit
> f7ffffff flags 60000200 index 10
>    PCI: 00:14.0 child on link 0 I2C: 01:50
>     I2C: 01:50
>     I2C: 01:51
>    PCI: 00:14.1
>    PCI: 00:14.2
>    PCI: 00:14.2 resource base f0144000 size 4000 align 14 gran 14 limit
> f7ffffff flags 60000201 index 10
>    PCI: 00:14.3 child on link 0 PNP: 002e.0
>    PCI: 00:14.3 resource base f014fb02 size 1 align 0 gran 0 limit
> f7ffffff flags 60000200 index a0
>    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags
> c0040100 index 10000000
>    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0
> flags c0040200 index 10000100
>     PNP: 002e.0
>     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags
> c0000100 index 60
>     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags
> c0000800 index 74
>     PNP: 002e.1
>     PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags
> e0000100 index 60
>     PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags
> e0000400 index 70
>     PNP: 002e.2
>     PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags
> c0000100 index 60
>     PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.3
>     PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags
> c0000100 index 60
>     PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800
> index 74
>     PNP: 002e.4
>     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 60
>     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 62
>     PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
> index 70
>     PNP: 002e.5
>     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff
> flags e0000100 index 60
>     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff
> flags e0000100 index 62
>     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags
> e0000400 index 70
>     PNP: 002e.6
>     PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.7
>     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
> 100 index 60
>     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 62
>     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 64
>     PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
> index 70
>     PNP: 002e.8
>     PNP: 002e.8 resource base 300 size 8 align 3 gran 3 limit fff flags
> c0000100 index 60
>     PNP: 002e.8 resource base 9 size 1 align 0 gran 0 limit 0 flags
> c0000400 index 70
>     PNP: 002e.9
>     PNP: 002e.9 resource base 220 size 1 align 0 gran 0 limit ffffffff
> flags c0000100 index 60
>     PNP: 002e.a
>     PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100
> index 60
>     PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400
> index 70
>    PCI: 00:14.4
>    PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff
> flags 60080102 index 1c
>    PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit
> f7ffffff flags 60081202 index 24
>    PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit
> f7ffffff flags 60080202 index 20
>    PCI: 00:14.5
>    PCI: 00:14.5 resource base f014e000 size 1000 align 12 gran 12 limit
> f7ffffff flags 60000200 index 10
>    PCI: 00:14.6
>    PCI: 00:14.7
>    PCI: 00:14.7 resource base f014fa00 size 100 align 8 gran 8 limit
> f7ffffff flags 60000201 index 10
>    PCI: 00:15.0
>    PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff
> flags 60080102 index 1c
>    PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit
> f7ffffff flags 60081202 index 24
>    PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit
> f7ffffff flags 60080202 index 20
>    PCI: 00:15.1 child on link 0 PCI: 03:00.0
>    PCI: 00:15.1 resource base 1000 size 1000 align 12 gran 12 limit ffff
> flags 60080102 index 1c
>    PCI: 00:15.1 resource base f0000000 size 100000 align 20 gran 20 limit
> f7ffffff flags 60081202 index 24
>    PCI: 00:15.1 resource base f7ffffff size 0 align 20 gran 20 limit
> f7ffffff flags 60080202 index 20
>     PCI: 03:00.0
>     PCI: 03:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff
> flags 60000100 index 10
>     PCI: 03:00.0 resource base f0004000 size 1000 align 12 gran 12 limit
> f7ffffff flags 60001201 index 18
>     PCI: 03:00.0 resource base f0000000 size 4000 align 14 gran 14 limit
> f7ffffff flags 60001201 index 20
>    PCI: 00:15.2
>    PCI: 00:15.3
>    PCI: 00:18.0
>    PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0
> flags f0000200 index c0010058
>    PCI: 00:18.1
>    PCI: 00:18.2
>    PCI: 00:18.3
>    PCI: 00:18.4
>    PCI: 00:18.5
> Done allocating resources.
> BS: BS_DEV_RESOURCES times (us): entry 0 run 1210144 exit 0
> Enabling resources...
>
> Fam15 - domain_enable_resources: AmdInitMid.
> agesawrapper_amdinitmid Unexpected Exception: 0 @ 10:0022fabf - Halting
> Code: 0 eflags: 00010046
> eax: 0002e630 ebx: 0000014d ecx: 00000002 edx: 00000000
> edi: 100123e3 esi: 00000000 ebp: 10000660 esp: 002bcd60
>
> 0022fa78:       00 00 89 c3 8b 45 00 c7
> 0022fa80:       44 24 0c 00 00 00 00 c7
> 0022fa88:       44 24 04 70 01 00 00 c7
> 0022fa90:       04 24 0f 00 00 00 89 44
> 0022fa98:       24 10 8d 44 24 74 89 44
> 0022faa0:       24 08 e8 90 44 00 00 80
> 0022faa8:       7c 24 77 00 8b 45 00 89
> 0022fab0:       04 24 0f 48 de e8 f5 17
> 0022fab8:       00 00 6b c0 64 31 d2 f7
> 0022fac0:       f6 89 44 24 40 8b 45 00
> 0022fac8:       89 04 24 e8 df 17 00 00
> 0022fad0:       6b c0 64 31 d2 f7 f3 89
> 0022fad8:       c1 8b 45 00 c7 44 24 0c
> 0022fae0:       00 00 00 00 c7 44 24 04
> 0022fae8:       74 27 00 00 c7 04 24 12
> 0022faf0:       00 00 00 89 4c 24 28 89
>
> ------------------------------
>
> _______________________________________________
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> coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>
> End of coreboot Digest, Vol 109, Issue 2
> ****************************************
>
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