[coreboot] latest baytrail fsp on CRB

Mike Hibbett mhibbett at ircona.com
Wed Jun 18 22:58:04 CEST 2014

Use the one that came with your board, or get the latest From the IBL. I forget the document number but the file is called byt-i_sec_dual_boot_pv_gold


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On 18 June 2014 21:15:51 Wen Wang <wen.wang at adiengineering.com> wrote:
.config file attached.

Also what should I do for flash descriptor?



From: Mike Hibbett [mailto:mhibbett at ircona.com]
Sent: Wednesday, June 18, 2014 2:29 PM
To: Wen Wang; coreboot at coreboot.org
Subject: Re: [coreboot] latest baytrail fsp on CRB

Can you post your coreboot .config file?

I'm booting bayley bay with a b3 e3815.


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On 18 June 2014 19:13:49 Wen Wang <wen.wang at adiengineering.com<mailto:wen.wang at adiengineering.com>> wrote:
Hi all,

Has anybody been able to boot Bayley Bay CRB with the latest coreboot source from the git tree?   We have a Bayley Bay CRB (E3827, B3). With coreboot Baytrail fsp support pulled from about two weeks ago and some help from Martin, I was able to see coreboot booting and fsp loaded, but was having issues with SeaBIOS.  I pulled latest source tree this morning and found out it does not boot any more on my board. Port 80 stuck at code 0x43, no console output.

Here are my steps:

1.       Build coreboot toolchain.

2.       Build coreboot.rom using fsp and microcode from BAY_TRAIL_FSP_KIT downloaded from Intel fsp site.

3.       Flash coreboot.rom to top 2M of the 8M flash.

I was getting the usage information here and there from the discussion threads and perhaps I missed something? It would be great if somebody could post the detailed procedure.


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