[coreboot] Intel FSP on Bayley Bay CRB: No output

Peter Stuge peter at stuge.se
Thu Jun 5 22:43:27 CEST 2014

Martin Roth wrote:
> the FSP is supposed to

It looks very bad when FSP shortcomings generate issues in coreboot.

I can only hope that the whole FSP thing was in fact exceptionally
well thought through...


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