[coreboot] F2A85-M: Chassis Fan Not Working

Idwer Vollering vidwer at gmail.com
Thu Jul 3 16:04:09 CEST 2014


2014-06-28 17:59 GMT+02:00 HacKurx <hackurx at gmail.com>:
> Hi,
>
> I just update coreboot on my motherboard and after reboot of my
> computer the chassis fan stopped working.
>
> I did not have this problem with the version of coreboot from 1 March 2014:
> http://review.coreboot.org/#/c/5226/
>
> Have you an idea of the problem? Thank you

No, I can't reproduce that (see console output below). Then again, I
don't use the boxed fan ;)

Do(es) the fan(s) start when you put some load on your machine, to
'warm up' the APU? Play some 1080p video or compile a linux kernel,
reusing your distribution's .config found in /boot/ or /proc/

coreboot-4.0-6334-g6a089e3 do jul  3 15:47:49 CEST 2014 starting...
BSP Family_Model: 00610f01
cpu_init_detectedx = 00000000
agesawrapper_amdinitreset Fch OEM config in INIT RESET Done
PCI: 00:14.4 bridge ctrl <- 0403
PCI: 00:14.4 cmd <- 01
PCI: 00:14.5 subsystem <- 1022/1410
PCI: 00:14.5 cmd <- 02
PCI: 00:14.7 subsystem <- 1022/1410
PCI: 00:14.7 cmd <- 06
PCI: 00:15.0 bridge ctrl <- 0003
PCI: 00:15.0 cmd <- 00
PCI: 00:15.1 bridge ctrl <- 0003
PCI: 00:15.1 cmd <- 07
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1410
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1410
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1410
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1410
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1410
PCI: 00:18.5 cmd <- 00
PCI: 03:00.0 cmd <- 03
done.
BS: BS_DEV_ENABLE times (us): entry 321 run 38403 exit 0
Initializing devices...
Root Device init
Root Device init 794 usecs
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic cpu ops (good)
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x10 done.
siblings = 03, CPU #0 initialized
CPU1: stack_base 002c5000, stack_end 002c5ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic cpu ops (good)
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x11 done.
siblings = 03, CPU #1 initialized
CPU2: stack_base 002c4000, stack_end 002c4ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic cpu ops (good)
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x12 done.
siblings = 03, CPU #2 initialized
CPU3: stack_base 002c3000, stack_end 002c3ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
Waiting for 1 CPUS to stop
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic cpu ops (good)
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local apic... apic_id: 0x13 done.
siblings = 03, CPU #3 initialized
All AP CPUs stopped (1219 loops)
CPU1: stack: 002c5000 - 002c6000, lowest used address 002c5dc8, stack
used: 568 bytes
CPU2: stack: 002c4000 - 002c5000, lowest used address 002c4dc8, stack
used: 568 bytes
CPU3: stack: 002c3000 - 002c4000, lowest used address 002c3dc8, stack
used: 568 bytes
CPU_CLUSTER: 0 init 153026 usecs
PCI: 00:00.0 init
PCI: 00:00.0 init 830 usecs
PCI: 00:01.0 init
In CBFS, ROM address for PCI: 00:01.0 = ffc00778
PCI expansion ROM, signature 0xaa55, INIT size 0xfa00, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 9904,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from ffc00778 to 0xc0000, 0xfa00 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
... Option ROM returned.
VGA Option ROM was run
PCI: 00:01.0 init 77789 usecs
PCI: 00:01.1 init
PCI: 00:01.1 init 830 usecs
PCI: 00:10.0 init
PCI: 00:10.0 init 830 usecs
PCI: 00:10.1 init
PCI: 00:10.1 init 830 usecs
PCI: 00:11.0 init
PCI: 00:11.0 init 830 usecs
PCI: 00:12.0 init
PCI: 00:12.0 init 830 usecs
PCI: 00:12.2 init
PCI: 00:12.2 init 830 usecs
PCI: 00:13.0 init
PCI: 00:13.0 init 830 usecs
PCI: 00:13.2 init
PCI: 00:13.2 init 826 usecs
PCI: 00:14.0 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x10
IOAPIC: ID = 0x04
IOAPIC: Dumping registers
  reg 0x0000: 0x04000000
  reg 0x0001: 0x00178021
  reg 0x0002: 0x04000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 init 66902 usecs
PCI: 00:14.2 init
PCI: 00:14.2 init 830 usecs
PCI: 00:14.3 init
RTC Init
PCI: 00:14.3 init 1284 usecs
PCI: 00:14.4 init
PCI: 00:14.4 init 830 usecs
PCI: 00:14.5 init
PCI: 00:14.5 init 830 usecs
PCI: 00:14.7 init
PCI: 00:14.7 init 826 usecs
PCI: 00:15.0 init
PCI: 00:15.0 init 830 usecs
PCI: 00:15.1 init
PCI: 00:15.1 init 830 usecs
PCI: 00:18.0 init
PCI: 00:18.0 init 830 usecs
PCI: 00:18.1 init
PCI: 00:18.1 init 830 usecs
PCI: 00:18.2 init
PCI: 00:18.2 init 830 usecs
PCI: 00:18.3 init
PCI: 00:18.3 init 830 usecs
PCI: 00:18.4 init
PCI: 00:18.4 init 830 usecs
PCI: 00:18.5 init
PCI: 00:18.5 init 830 usecs
PNP: 002e.1 init
PNP: 002e.1 init 786 usecs
PNP: 002e.4 init
ITE IT8728F Super I/O HWM: Initializing Hardware Monitor..
ITE IT8728F Super I/O HWM: Base Address at 0x295
PNP: 002e.4 init 5574 usecs
PNP: 002e.5 init
Keyboard init...
No PS/2 keyboard detected.
PNP: 002e.5 init 143934 usecs
PNP: 002e.7 init
PNP: 002e.7 init 787 usecs
PCI: 03:00.0 init
PCI: 03:00.0 init 830 usecs
Devices initialized
Show all devs...After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.a: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
APIC: 11: enabled 1
APIC: 12: enabled 1
APIC: 13: enabled 1
PCI: 03:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 569533 exit 0
CBMEM region bf120000-bfffffff (cbmem_check_toc)
CBMEM region bf120000-bfffffff (cbmem_initialize_empty)
Adding CBMEM entry as no. 1
Moving GDT to bf120200...ok
Adding CBMEM entry as no. 2
Finalize devices...
Devices finalized
Adding CBMEM entry as no. 3
DmiTable:0, AcpiPstatein: 10010126, AcpiSrat:0,AcpiSlit:0,
Mce:100111ba, Cmc:1001127c,Alib:10011336, AcpiIvrs:0 in
agesawrapper_amdinitlate
NvStorageSize=383, NvStorage=1001ccd4
SF: Detected MX25L3205D with page size 1000, total 400000
SF: Successfully erased 4096 bytes @ 0xffff7000
VolatileStorageSize=5a26, VolatileStorage=1001d057
SF: Detected MX25L3205D with page size 1000, total 400000
SF: Successfully erased 24576 bytes @ 0xffff0000
SF: Detected MX25L3205D with page size 1000, total 400000
SF: Successfully erased 4096 bytes @ 0xffff6000
BS: BS_POST_DEVICE times (us): entry 8449 run 3009 exit 3334098
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Adding CBMEM entry as no. 4
Writing IRQ routing tables to 0xbf130600...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f061c
Adding CBMEM entry as no. 5
Wrote the mp table end at: bf131610 - bf13181c
MP table: 540 bytes.
Adding CBMEM entry as no. 6
ACPI: Writing ACPI tables at bf132600...
ACPI:    * DSDT at bf1326c8
ACPI:    * DSDT @ bf1326c8 Length 187c
ACPI: * FACS at bf133f48
ACPI:  * FADT at bf133f88
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI:  * HPET at bf134080
ACPI: added table 2/32, length now 44
ACPI:  * MADT at bf1340b8
ACPI: added table 3/32, length now 48
ACPI: added table 4/32, length now 52
ACPI:    * IVRS at bf134300
  AGESA IVRS table NULL. Skipping.
ACPI:    * SRAT at bf134300
  AGESA SRAT table NULL. Skipping.
ACPI:   * SLIT at bf134300
  AGESA SLIT table NULL. Skipping.
ACPI:  * AGESA ALIB SSDT at bf134300
ACPI: added table 5/32, length now 56
ACPI:    * SSDT at bf134820
ACPI: added table 6/32, length now 60
ACPI:    * SSDT for PState at bf135560
ACPI:    * SSDT
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 12197 bytes.
Adding CBMEM entry as no. 7
smbios_write_tables: bf13da00
Root Device (ASUS F2A85-M)
CPU_CLUSTER: 0 (AMD FAM15 Root Complex)
APIC: 10 (AMD CPU Family 15h)
DOMAIN: 0000 (AMD FAM15 Root Complex)
PCI: 00:00.0 (AMD FAM15 Northbridge)
PCI: 00:01.0 (AMD FAM15 Northbridge)
PCI: 00:01.1 (AMD FAM15 Northbridge)
PCI: 00:02.0 (AMD FAM15 Northbridge)
PCI: 00:03.0 (AMD FAM15 Northbridge)
PCI: 00:04.0 (AMD FAM15 Northbridge)
PCI: 00:05.0 (AMD FAM15 Northbridge)
PCI: 00:06.0 (AMD FAM15 Northbridge)
PCI: 00:07.0 (AMD FAM15 Northbridge)
PCI: 00:08.0 (AMD FAM15 Northbridge)
PCI: 00:10.0 (ATI HUDSON)
PCI: 00:10.1 (ATI HUDSON)
PCI: 00:11.0 (ATI HUDSON)
PCI: 00:12.0 (ATI HUDSON)
PCI: 00:12.2 (ATI HUDSON)
PCI: 00:13.0 (ATI HUDSON)
PCI: 00:13.2 (ATI HUDSON)
PCI: 00:14.0 (ATI HUDSON)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
PCI: 00:14.1 (ATI HUDSON)
PCI: 00:14.2 (ATI HUDSON)
PCI: 00:14.3 (ATI HUDSON)
PNP: 002e.0 (ITE IT8728F Super I/O)
PNP: 002e.1 (ITE IT8728F Super I/O)
PNP: 002e.2 (ITE IT8728F Super I/O)
PNP: 002e.3 (ITE IT8728F Super I/O)
PNP: 002e.4 (ITE IT8728F Super I/O)
PNP: 002e.5 (ITE IT8728F Super I/O)
PNP: 002e.6 (ITE IT8728F Super I/O)
PNP: 002e.7 (ITE IT8728F Super I/O)
PNP: 002e.a (ITE IT8728F Super I/O)
PCI: 00:14.4 (ATI HUDSON)
PCI: 00:14.5 (ATI HUDSON)
PCI: 00:14.6 (ATI HUDSON)
PCI: 00:14.7 (ATI HUDSON)
PCI: 00:15.0 (ATI HUDSON)
PCI: 00:15.1 (ATI HUDSON)
PCI: 00:15.2 (ATI HUDSON)
PCI: 00:15.3 (ATI HUDSON)
PCI: 00:18.0 (AMD FAM15 Northbridge)
PCI: 00:18.1 (AMD FAM15 Northbridge)
PCI: 00:18.2 (AMD FAM15 Northbridge)
PCI: 00:18.3 (AMD FAM15 Northbridge)
PCI: 00:18.4 (AMD FAM15 Northbridge)
PCI: 00:18.5 (AMD FAM15 Northbridge)
APIC: 11 (unknown)
APIC: 12 (unknown)
APIC: 13 (unknown)
PCI: 03:00.0 (unknown)
SMBIOS tables: 336 bytes.
Adding CBMEM entry as no. 8
Adding CBMEM entry as no. 9
Adding CBMEM entry as no. 10
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4de0
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0xbffdf200
rom_table_end = 0xbffdf200
... aligned to 0xbffe0000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-00000000bf11ffff: RAM
 3. 00000000bf120000-00000000bfffffff: CONFIGURATION TABLES
 4. 00000000c0000000-00000000dfffffff: RESERVED
 5. 00000000f8000000-00000000fbffffff: RESERVED
 6. 0000000100000000-000000021effffff: RAM
Wrote coreboot table at: bffdf200, 0x180 bytes, checksum ddcd
coreboot table: 408 bytes.
FREE SPACE  0. bffe7200 00018e00
GDT         1. bf120200 00000200
CONSOLE     2. bf120400 00010000
TIME STAMP  3. bf130400 00000200
IRQ TABLE   4. bf130600 00001000
SMP TABLE   5. bf131600 00001000
ACPI        6. bf132600 0000b400
SMBIOS      7. bf13da00 00000800
ACPI RESUME 8. bf13e200 00e00000
ACPISCRATCH 9. bff3e200 000a1000
COREBOOT   10. bffdf200 00008000
BS: BS_WRITE_TABLES times (us): entry 0 run 184018 exit 0
CBFS: located payload @ ffc107b8, 56957 bytes.
Loading segment from rom address 0xffc107b8
  code (compression=1)
  New segment dstaddr 0xe4abc memsize 0x1b544 srcaddr 0xffc107f0 filesize 0xde45
  (cleaned up) New segment addr 0xe4abc size 0x1b544 offset 0xffc107f0
filesize 0xde45
Loading segment from rom address 0xffc107d4
  Entry Point 0x000fd076
Bounce Buffer at bee11000, 3203168 bytes
Loading Segment: addr: 0x00000000000e4abc memsz: 0x000000000001b544
filesz: 0x000000000000de45
lb: [0x0000000000200000, 0x0000000000387030)
Post relocation: addr: 0x00000000000e4abc memsz: 0x000000000001b544
filesz: 0x000000000000de45
using LZMA
[ 0x000e4abc, 00100000, 0x00100000) <- ffc107f0
dest 000e4abc, end 00100000, bouncebuffer bee11000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 44794 exit 0
Jumping to boot code at 000fd076
CPU0: stack: 002c6000 - 002c7000, lowest used address 002c65e0, stack
used: 2592 bytes
entry    = 0x000fd076
lb_start = 0x00200000
lb_size  = 0x00187030
buffer   = 0xbee11000



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