[coreboot] C720 swapparoo
jlewis at johnlewis.ie
Wed Jan 29 23:28:44 CET 2014
On 29/01/14 22:25, Aaron Durbin wrote:
> On Wed, Jan 29, 2014 at 4:16 PM, John Lewis <jlewis at johnlewis.ie> wrote:
>> On 29/01/14 22:03, Aaron Durbin wrote:
>>>> This is where we reach the crux of the matter - In the stock/shellball
>>>> firmware, extracting BOOT_STUB doesn't yield a file which cbfstool in
>>>> upstream coreboot or CrOS coreboot can decipher. Looking at the file in
>>>> hexedit it appears to be almost identical to a CBFS that is recognised,
>>>> that's it. I have managed to extract the SVGA binary from the CBFS in the
>>>> RW_LEGACY slot, and I've made an educated guess as to where the
>>>> begins and ends in the unrecognised CBFS (section beginning "LARCHIVE
>>>> mrc.bin" or similar with the binary itself following, surrounded by FF's)
>>>> copying and pasting it to a file. I would like to know if I am correct in
>>>> assumptions about extracting that file manually and what size it should
>>>> in bytes?
>>> That's interesting. It is just a regular 'ol cbfs. The images that
>>> shipped with your device is an 8MiB SPI. First 2MiB Duncan covered.
>>> The next 5 have nothing to do w/ coreboot proper -- all the extra
>>> vboot firmware bits. The last 1MiB is the cbfs.
>> Okay, well I extracted the attached file using:
>> eval `./fmap_decode bios.bin | grep BOOT_STUB`
>> dd if=c720.rom ibs=$((area_offset)) skip=1 | dd bs=$((area_size))
>> iflag=fullblock of=c720-coreboot.bin
>> ../coreboot/build/cbfstool c720-coreboot.bin print
>> 1024 kB, bootblocksize 3144, romsize 8388608, offset 0x700000
>> alignment: 64 bytes
>> Name Offset Type Size
> Try cherry-picking this one:
It seems I don't have permission to see that, as a non-Googler.
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