[coreboot] Strange Coreboot behaviors while building IVB Cougar Canyon Coreboot based upon intel.com/fsp IVB FSP

[Marc Jones]

Is the descriptor binary in the second 4MB flash. The split flash is a
little confusing, but handy as you can make changes to coreboot and not the
descriptor and me. Do you get post codes?

Marc


On Fri, Jan 10, 2014 at 7:26 AM, Stojsavljevic, Zoran <
zoran.stojsavljevic at intel.com> wrote:

> Hello,
>
> After long time, I am returning to this domain, in attempt to build valid
> Coreboot using git clone from Coreboot.org .
>
> I have two instances I cloned, one is v4.0-4966, another one is latest
> (cloned today) v4.0-5223 ...
>
> Here is what I have while building v4.0-4966 (.config attached to the
> email as CONFIG_4966):
>
> coreboot.rom: 8192 kB, bootblocksize 864, romsize 8388608, offset 0x400000
> alignment: 64 bytes
>
> Name                           Offset     Type         Size
> cmos_layout.bin                0x400000   cmos_layout  1164
> pci8086,0166.rom               0x4004c0   optionrom    65536
> cpu_microcode_blob.bin         0x410500   microcode    32832 <<===== YES,
> microcode integrated
> fallback/romstage              0x4185c0   stage        31082
> fallback/coreboot_ram          0x41ff80   stage        75924
> fallback/payload               0x432880   payload      55177
> config                         0x440080   raw          4322
> (empty)                        0x4411c0   null         3403224
> fsp.bin                        0x77ffc0   (unknown)    393216
> (empty)                        0x7e0000   null         130072
>
> Needless to say, for some reason reset vector does not start (I see no
> serial outputs from FSP even)!
>
> Here is what I have while building v4.0-5223 (.config attached to the
> email as CONFIG_5223):
>
> coreboot.rom: 8192 kB, bootblocksize 992, romsize 8388608, offset 0x400000
> alignment: 64 bytes
>
> Name                           Offset     Type         Size
> cmos_layout.bin                0x400000   cmos_layout  1164
> pci8086,0166.rom               0x4004c0   optionrom    65536
> fallback/romstage              0x410500   stage        31583
> fallback/coreboot_ram          0x4180c0   stage        75182
> fallback/payload               0x42a6c0   payload      55156
> config                         0x437e80   raw          4419
> (empty)                        0x439000   null         3370904
> cpu_microcode_blob.bin         0x76ffc0   microcode    0 <<===== NO
> microcode!!!
> (empty)                        0x770000   null         65432
> fsp.bin                        0x77ffc0   (unknown)    393216
> (empty)                        0x7e0000   null         129944
>
> The same: reset vector does not go!
>
> Strange. Any clues?
>
> Thank you,
> Zoran
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