[coreboot] Coreboot supports intel baytrail processor?
Stojsavljevic, Zoran
zoran.stojsavljevic at intel.com
Fri Oct 25 09:58:35 CEST 2013
Hello Mario,
I am novice to Coreboot too. But. Not the first time learning experience, adds to the cause. I decided to "push" a bit Intel structures faster in time, contributing to Coreboot as Intel-er. ;-)
About Coreboot for BYT. If you'll wait a bit more, it'll come in the theatre near you. The present Coreboot from git is not adopted: [1]to FSPs; [2]to INTEL BYT boards; [3] No vbios for BYT.
[1] It is coming;
[2] if [1] completed, the [2] should be added ASAP;
[3] If [2] done, you need to add specific BYT vbios for VGA support in Coreboot snapshot you were using. I do know how to find vbios-es for Core, but not for ATOM. I've checked my Bayley Bay CRB with VLV2 stepping B0 in the lab, and here is what I am getting for VGA PCIe:
Bus 00, Device 02, Function 00 Display Controller VGA/8514 Controller
Vendor 0x8086, Device 0x0F31
So, what you need to do is to place BYT vbios (supposed to be 64K) in the directory src/.
CONFIG_VGA_ROM_RUN=y
CONFIG_VGA_BIOS=y
CONFIG_VGA_BIOS_ID="8086,0F31"
CONFIG_VGA_BIOS_FILE="./src/vbios.bin"
About "How to create a make menuconfig for the BYT FSP that not there is in the MAINBOARD VENDOR?" you need to do it by example (here is how it is done for IVB Emerald Lake 2):
[zoran at localhost emeraldlake2]$ pwd
/home/zoran/projects/coreboot/coreboot-v4.0-4709/src/mainboard/intel/emeraldlake2
[zoran at localhost emeraldlake2]$ cat Kconfig
if BOARD_INTEL_EMERALDLAKE2
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
select CPU_INTEL_SOCKET_RPGA989
select NORTHBRIDGE_INTEL_IVYBRIDGE
select SOUTHBRIDGE_INTEL_C216
select SUPERIO_SMSC_SIO1007
select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select HAVE_ACPI_RESUME
select GFXUMA
#select CHROMEOS
config MAINBOARD_DIR
string
default intel/emeraldlake2
config MAINBOARD_PART_NUMBER
string
default "EMERALD LAKE 2"
config MMCONF_BASE_ADDRESS
hex
default 0xf0000000
config IRQ_SLOT_COUNT
int
default 18
config MAX_CPUS
int
default 16
config VGA_BIOS_FILE
string
default "pci8086,0166.rom"
endif # BOARD_INTEL_EMERALDLAKE2
[zoran at localhost emeraldlake2]$
I'll find out about [1] and [2].
Stay tuned,
Zoran
_______
Most of The Time you should be "intel inside" to be capable to think "out of the box".
From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org] On Behalf Of Mário Wilson
Sent: Friday, October 25, 2013 12:56 AM
To: Stojsavljevic, Zoran
Cc: ron minnich; Joshua Kim; coreboot at coreboot.org
Subject: Re: [coreboot] Coreboot supports intel baytrail processor?
Hello Zoran,
Thanks for the reply, I checked the INTEL reference document.
Can you answer other questions, I am very new in Coreboot world!
My local Intel representative will inform to me in the documentation as I add specific network and video drivers in the coreboot image?
How to create a make menuconfig for the BYT FSP that not there is in the MAINBOARD VENDOR?
Best Regards.
Mário Wilson
Development Engineer
LESC
Computer Systems Engineer Laboratory
www.lesc.ufc.br
e-mail: mario at lesc.ufc.br
Campus do Pici s/n. Bloco 723, zip:60440-970, Fortaleza-Ceará-Brazil
Phone:+55 (85) 3366 9608 extension:232
"Se não puder destacar-se pelo talento, vença pelo esforço"
2013/10/22 Stojsavljevic, Zoran <zoran.stojsavljevic at intel.com>
Hello Mario,
Please, could you download INTEL public document: http://www.intel.com/content/dam/www/public/us/en/documents/presentation/bldk-rapid-dev-presentation.pdf ?
There, on page 11 you can see what in nutshell BYT/any other FSP looks like: it is nothing more than SEC and PEI phases of EFI/UEFI BIOS (does initialization of the processor, chipset, memory - mrc). Tailored for the specific purposes. Coreboot comes on the top of this to initialize ACPI (PM), e1000 (net), VGA (video) etc. (more than outlined). And then passes control to its payload.
For BYT FSP you should go to your local INTEL Point of Contact, and request access to the restricted documents considering BYT FSP. I know that these are intensive INTEL activities to release Proof of Concept for BYT FSP with Coreboot. More I cannot reveal. All these you should ask your local INTEL representative. Policy of the company. Sorry...
Zoran
_______
Most of The Time you should be "intel inside" to be capable to think "out of the box".
From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org] On Behalf Of Mário Wilson
Sent: Monday, October 21, 2013 5:13 PM
To: ron minnich
Cc: Stojsavljevic, Zoran; Joshua Kim; coreboot at coreboot.org
Subject: Re: [coreboot] Coreboot supports intel baytrail processor?
Good day,
I'm also looking for information on the FSP to use it in the Bay Trail platform.
Done reading the documentation and wanted to know if you can answer the following questions:
- If the FSP does initialization processor, chipset, memory and Coreboot also does this, how to integrate the binary FSP within the structure of the Coreboot?
thank you,
Mário Wilson
Development Engineer
LESC
Computer Systems Engineer Laboratory
www.lesc.ufc.br
e-mail: mario at lesc.ufc.br
Campus do Pici s/n. Bloco 723, zip:60440-970, Fortaleza-Ceará-Brazil
Phone:+55 (85) 3366 9608 extension:232
"Se não puder destacar-se pelo talento, vença pelo esforço"
2013/9/4 ron minnich <rminnich at gmail.com>
On Wed, Sep 4, 2013 at 12:53 AM, Stojsavljevic, Zoran
<zoran.stojsavljevic at intel.com> wrote:
> Hello Ron,
>
> Yes, Baytrail FSP Beta release is already for 4 weeks available in EDS (External Design Specifications), but you must be registered with INTEL to get Baytrail FSP and it documents. Also, as I stated before, you need OTM (Coreboot will come later as part of this picture).
I'm on the web site and hunting around and it seems, at present, to be
incomplete. Also, saying FSP is available in beta as an EDS (a spec)
makes no sense to me. Where's the FSP binary itself?
For instance, after passing through many links and looking at many
docs, I am here:
https://www-ssl.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html
But all I can are documents, nice looking people, and links that have
nothing to do with FSP. Where do I go?
What are the redistribution rights on FSP? I assume we'll be able to
host the binary at coreboot.org as well as intel.com.
ron
--
coreboot mailing list: coreboot at coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
More information about the coreboot
mailing list