[coreboot] New patch to review for coreboot: 6eb3a56 lynxpoint: Enable EC IO ports 0x62/0x66

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2810

-gerrit

commit 6eb3a56b9ab502c446647bb8bbe96214755dfbef
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Thu Mar 7 14:00:43 2013 -0800

    lynxpoint: Enable EC IO ports 0x62/0x66
    
    In order to be able to talk to an EC via standard path.
    
    Change-Id: I3fe76882dec9a0596cbc1c844afa2ddb03ed771c
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/southbridge/intel/lynxpoint/early_pch.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index e7b62b4..3709aed 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -90,8 +90,9 @@ static void pch_enable_lpc(void)
 	/* Set COM1/COM2 decode range */
 	pci_write_config16(dev, LPC_IO_DEC, 0x0010);
 
-	/* Enable SuperIO + COM1 + PS/2 Keyboard/Mouse */
-	u16 lpc_config = CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN | KBC_LPC_EN;
+	/* Enable SuperIO + MC + COM1 + PS/2 Keyboard/Mouse */
+	u16 lpc_config = CNF1_LPC_EN | CNF2_LPC_EN |
+		COMA_LPC_EN | KBC_LPC_EN | MC_LPC_EN;
 	pci_write_config16(dev, LPC_EN, lpc_config);
 }