[coreboot] Patch merged into coreboot/master: 6f561af lynxpoint: lpc resource reservations
gerrit at coreboot.org
gerrit at coreboot.org
Thu Mar 14 20:18:59 CET 2013
the following patch was just integrated into master:
commit 6f561afa4a635958dedf20ffda9a40c6f5e5699e
Author: Aaron Durbin <adurbin at chromium.org>
Date: Wed Dec 19 14:38:01 2012 -0600
lynxpoint: lpc resource reservations
This commit updates the Lynx Point resource reservations before
the coreboot allocator assigns resources. There is no need to mark
anything as subtractive decode because there are no devices/buses
linked to the LPC device.
The I/O range reservations consists of claiming the first 4KiB
of I/O space. The PMBASE, GPIOBASE, and LPC generic I/O decode
ranges are checked against the default claimed range. If those
ranges overlap or fall outside of the default range then those
resources are added.
The MMIO range reservations consist of claiming everything from
the I/O APIC to 4GiB. The RCBA and the LPC Generic Memory range
register are then conditionally added if they fall outside of
the default MMIO range.
Change-Id: I0f560a03814a2b15961fdbe61e4164cd54cff7a5
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/2682
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>
Build-Tested: build bot (Jenkins) at Wed Mar 13 02:59:43 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Thu Mar 14 20:18:57 2013, giving +2
See http://review.coreboot.org/2682 for details.
-gerrit
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