[coreboot] New patch to review for coreboot: cbad753 Eagleheights DSDT: Grant OS control through OSC

Mike Loptien (mike.loptien@se-eng.com) gerrit at coreboot.org
Wed Mar 13 23:34:07 CET 2013


Mike Loptien (mike.loptien at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2714

-gerrit

commit cbad7533a804fe18ba3b19aa126374561531ece4
Author: Mike Loptien <mike.loptien at se-eng.com>
Date:   Wed Mar 13 16:28:16 2013 -0600

    Eagleheights DSDT: Grant OS control through OSC
    
    Change the OSC method to actually grant control of
    PCIe capabilities to the OS instead of granting no
    control.  I believe the logic was backwards in the
    original commit.  Bits should be set when granting
    control and cleared when not granting control.  By
    setting the return value to 0x00, we effectively
    tell the OS that it cannot control any PCIe
    capability.  See section 6.2.9 of the ACPI spec
    version 3.0 for more information.
    
    This edit is a duplication of the OSC method that
    is in the src/southbridge/intel/bd82x6x/pch.asl
    file.
    
    Change-Id: Id2462ab12203afceb9033f24d06b4dfbf2236d2e
    Signed-off-by: Mike Loptien <mike.loptien at se-eng.com>
---
 3rdparty                                  |  2 +-
 src/mainboard/intel/eagleheights/dsdt.asl | 45 +++----------------------------
 2 files changed, 4 insertions(+), 43 deletions(-)

diff --git a/3rdparty b/3rdparty
index ba8caa3..dac1a18 160000
--- a/3rdparty
+++ b/3rdparty
@@ -1 +1 @@
-Subproject commit ba8caa30bd5ed6d89dbfd40e17c75c94d43804c6
+Subproject commit dac1a18d184976e4447b98479f0b7a172054b98f
diff --git a/src/mainboard/intel/eagleheights/dsdt.asl b/src/mainboard/intel/eagleheights/dsdt.asl
index 507d250..cb9ec8e 100644
--- a/src/mainboard/intel/eagleheights/dsdt.asl
+++ b/src/mainboard/intel/eagleheights/dsdt.asl
@@ -179,50 +179,11 @@ DefinitionBlock ("DSDT", "DSDT", 1, "EAGLE", "COREBOOT", 0x0000001)
 		Method (_OSC, 4)
 		{
 			/* Check for proper GUID */
-		If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
-		{
-			/* Create DWORD-adressable field from the Capabilities Buffer */
-			CreateDWordField (Arg3, 0, CDW1)
-			CreateDWordField (Arg3, 4, CDW2)
-			CreateDWordField (Arg3, 8, CDW3)
-
-			/* Save Capabilities DWord 2 & 3 */
-			Store (CDW2, SUPP)
-			Store (CDW3, CTRL)
-
-			/* Don't care of OS capabilites */
-			/* We support nothing (maybe we should add PCIe Capability Structure Control) */
-			And (CTRL, 0x00, CTRL)
-
-			/* Query flag clear ? */
-			If (Not (And (CDW1, 1)))
+			If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
 			{
-				/* Nothing to do */
+				/* Let OS control everything */
+				Return (Arg3)
 			}
-
-			/* Unknown revision ? */
-			If (LNotEqual (Arg1, One))
-			{
-				Or (CDW1, 0x08, CDW1)
-			}
-
-			/* Capabilities bits masked ? */
-			If (LNotEqual (CDW3, CTRL))
-			{
-				Or (CDW1, 0x10, CDW1)
-			}
-
-			/* Update DWORD3 in the buffer */
-			Store (CTRL, CDW3)
-
-			Return (Arg3)
-		}
-		Else
-		{
-			/* Unrecognized UUID */
-			Or (CDW1, 4, CDW1)
-			Return (Arg3)
-		}
 		} /* End _OSC */
 
 			Method (_PRT, 0, NotSerialized)



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