[coreboot] AMD LX northbridge question
Christian Gmeiner
christian.gmeiner at gmail.com
Mon Jun 3 10:39:02 CEST 2013
Looking at src / northbridge / amd / lx / northbridge.c I see a the
following lines:
400 static void pci_domain_enable(device_t dev)
401 {
402 printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __func__);
403
404 // do this here for now -- this chip really breaks our device model
405 northbridge_init_early();
406 cpubug();
407 chipsetinit();
http://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/northbridge/amd/lx/northbridge.c;h=6eae35298ac13b29b3815a72378b9f09e90d8dd5;hb=HEAD#l404
Can somebody tell me why "this chip really breaks our device model"?
And what would
be the correct way to do it?
thanks
--
Christian Gmeiner, MSc
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